We have investigated the allowed bending radius of high-quality pentacene field-effect transistors (OFETs) manufactured on a plastic substrate of a polyethylenenaphthalate (PEN) film with a polyimide gate dielectric layer. It is found that the reduction of mobility due to the application of an expansive stress with a radius of curvature (R) smaller than about 1 mm, was only 20 %. Furthermore, the mobility increase by 7 % to 0.28 cm2/Vs on a compressive stress with R=4.6 mm. We also studied the recovery performance after stressing OFETs. No significant change and residual effect in performance has been found after the removal of the compressive bending the device down to a radius of 4.6 mm (1.4 ± 0.1 % in strain). In the analysis of the mechanical flexibility, we demonstrated that our OFETs electrical properties were fairly stable during the application of an expansive and compressive stress down to several mm in bending radius.

Self-supporting polymer foils of several micrometer thickness have been structured using irradiation by fast heavy ions and subsequent etching. Very deep, well defined nanostructures can be prepared in this way. These can then be used as templates for semiconductor deposition and the fabrication of robust embedded electronic devices. Electron microscopy shows void- filling poly-crystalline growth in the polymer films. Electrical experiments show low sensitivity when mechanical forces are exerted on the foil, suggesting that the embedded nano- devices can be used as reliable sensors in applications with considerable bending of the foils. Two different transistor arrangements will be discussed.

The new integrated circuit concept that forms electronic equipment by the textile structure using the flexible fiber that has equipped the field effect transistor, the light emitting diode, the wiring pattern, etc. was proposed [1,2]. In this report, the structure of the filamentous body as a basic structure of the kumihimo with various electronic functions was examined. There are many kinds of one in the kumihimo by the number and how to unite the plaited thread used. Although such a highly efficient kumihimo-structure electronic integrated circuit can be realized using kumihimo with much thread, it becomes that much complicated. In order to simplify an argument here, square-type kumihimo that uses eight plaited threads is employed, and a basic logical circuit composition and the element arrangement on plaited thread are examined. Eight plaited-threads are divided into two groups that have four threads respectively, and they exist in the plane that intersected perpendicularly mutually. However, kumihimo is a 1-dimensional system fundamentally, it can be extended in the length direction if necessary, and it is considered that a quite complicated function is also realizable for a circuit with few input and output. Here, plaited thread that belongs to one group for convenience will be called warp and the other group will be called woof. The circuit composition and a concrete structure of threads for kumihimo are discussed.

PEDOT/PSS is an air-stable and solution-processable semiconductor polymer with great potential for electronic applications. In this research, we investigated the PEDOT/PSS-metal contacts using Al-PEDOT/PSS-Au as a test device. Abnormal electrical hysteresis phenomena were observed in both the current-voltage and capacitance-voltage characteristics of the device. A model in terms of metal-polymer interfacial MIS structure and ion motion in the polymer is proposed for explanation of the ‘hysteresis’ phenomena.

New poly(fluorene-thiophene) alternating copolymers are described in which either the dioctylfluorene or bithiophene units in poly(9,9-dioctylfluorene-alt-bithiophene) (F8T2) are replaced by other fluorene or thiophene-based groups, respectively. Improvements in solubility are realized when the bithiophene unit of F8T2 is replaced by dihexylterthiophene or dihexylpentathiophene units. Melting temperatures are also lowered by 50 – 100°C in these polymers when compared to F8T2. Replacement of the bithiophene unit of F8T2 with a dihexylpentathiophene unit also results in a significant improvement in hysteresis (< 2 V vs. 3.5 – 5 V for F8T2). Initial results are also reported on the thermal cleavage of the C8 side groups of F8T2, which yields an insoluble polymeric semiconductor film that continues to exhibit transistor switching characteristics as part of a bottom gate device.

We present the studying of oxygen and moisture traps in MEH-PPV through the MIS Capacitance – Voltage (C-V) analysis, and the Attenuated Total Reflection Infrared (ATR IR) spectroscopy technique. The presence of oxygen studied by ATR IR has also been verified by optical images from high resolution optical microscope. In quasi-static C-V measurements of the MIS (Al/MEH-PPV/p-Si) capacitors made, an extension of the weak inversion region was measured before strong inversion, which becomes more pronounced with aging. This increase in the weak inversion region is attributed to electron trapping by oxygen to form negative ions in the MEH-PPV layer. ATR IR spectroscopy shows the formation of carbonyl peak at 1651 cm−1 with aging, which is due to the presence of oxygen. Both the C-V analysis and Attenuated Total Reflection IR Spectroscopy are powerful tools for investigating the degradation of MEH-PPV polymer.

The TFT fabrication by PECVD at low processing temperature (<100°C) is of great importance due to its compatibility with low-cost plastic foil substrates. The first bottom gate amorphous silicon TFTs fabricated at 75°C in our lab demonstrated the leakage current of 10−12A, the threshold voltage of 15V and the field effect mobility of 10−2cm2/(Vs). To increase the field-effect mobility, reduce the threshold voltage, and reduce the mask count, nanocrystalline silicon based top gate TFT was designed.

The TFT fabrication process was done at maximum processing temperature of 75°C. The direct PECVD SiNx and SiOx/SiNx stack were used as gate dielectrics. Nanocrystalline silicon was used as the channel layer. The SiNx gate dielectric TFTs demonstrated the leakage current about 10−13A, the threshold voltage of 8..10V, the field effect mobility of ∼10−4cm2/(Vs), the subthreshold slope of 4..8V/decade, and Ion/Ioffratio of about 102. High source and drain contact resistance were attributed to low efficiency of phosphorous doping in amorphous silicon at 75°C, which also limited the Ion value. Using n+ nc-Si for the source and drain contacts, the Ion/Ioffratio was increased to 106, and the field effect mobility was increased to ∼0.1cm2/(Vs). The threshold voltage, however, increased, which was attributed to higher fixed charge.

This paper reports on hydrogenated amorphous silicon (a-Si:H) vertical thin film transistors (VTFTs) with channel length of 100 nm, using conventional planar TFT processing technology. The device has a fully self-aligned vertical channel structure, which is highly insensitive to the non-uniformity of reactive ion etching (RIE). Therefore, the VTFT process is very suitable for large-area electronics. Presently, we can demonstrate VTFTs with remarkable ON/OFF current ratio of more than 108, low leakage current down to 1 fA, and good subthreshold slope of 0.8 V/dec at Vd = 1.5 V. The impacts of contemporary device issues, such as short-channel effects and contact resistance, on the performance of short-channel VTFTs and suggested avenues for improvement are discussed.

We identified two causes of source/drain (S/D) series resistance (Rs) in bottom-contact (BC) pentancene thin-film transistors (TFTs). One is mixed-phase pentacene grown in the blurred- edge region of Au electrodes and the other is the semi-insulating pentacene region between the Au electrode and the carrier-accumulating layer. A novel Au S/D electrode structure with a self-assembled monolayer (SAM) adhesion layer enables direct injection of carriers into the accumulating layer and markedly reduces Rs for unit gate width (RsW) to 6 Mωμ[.proportional]m. BC TFTs with this electrode structure showed extrinsic field-effect mobility as high as 1.1 cm2/Vs.

Following the new concept proposed as an opto-electronic integrated system with “textile structure”, we propose here another integrated system-concept of flexible electronics based on “braid structure”. The braid integrated system forms electronic equipment constructed by the filamentous body. Opto-electronic integrated circuits are constructed with Kumihimo-structure by weaving more than three threads on which various devices, and components, such as, transistors, photoelectric transducers, contact-electrodes, pads for wiring and other passive components of circuits are mounted periodically.

From the experience of the designing of some basic logic circuits, the Kumihimo-structure weaved by eight-threads of two groups is proposed as a basic structure of the integrated circuit for application to single track braid system. Characteristics and elemental technologies of the braid system are analyzed for the extension of the concept. Application area of the system and requirements for the system are discussed. The braid system is also discussed in flexible electronics concept.

The use of brittle materials in flexible displays requires the understanding of the mechanical limitations of the materials and the various display architectures. We discuss various approaches to mechanical bend tests for components of flexible displays and describe a new test method based on a three-axis motion. We discuss the mechanical limitations of indium tin oxide (ITO) as a transparent conductor, and present results for a more mechanically robust multilayer transparent conductor made of an ITO-metal-ITO (IMI) stack. The IMI structures showed dramatically improved mechanical properties when subjected to bending both as a function of radius of curvature as well as number of cycles to a fixed radius. Organic light emitting devices fabricated on IMI anodes showed improved performance compared with those made on ITO anodes at current densities greater than 1 mA/cm2 due to the improved conductivity of the anode. We discuss the difficulties in analysis of the mechanical failure of transparent thin film permeation barriers. We present a novel approach for etching barrier-coated polymer substrates such that film cracking is readily visible. We report on the bend test results for sputter- deposited SiOxNy films.

We report a high luminance and low operating voltage molecular organic light-emitting diode (MOLED) using a conducting polymer hole-injecting electrode (anode) on a plastic substrate. A dramatic improvement in the rectification ratio is observed upon the insertion of a buffer layer between the conducting polymer anode and the organic hole-transporting layer (HTL). Micro-shorts leading to a leakage current caused by the non-uniformity of the polymer film are greatly reduced. Atomic force microscope (AFM) images show a much smoother surface of the polymer anode/buffer layer relative to that of the bare polymer film. A slight increase (0.3eV ± 0.2eV) in the work function of the polymer anode upon the addition of the buffer layer is also measured. A simple method of patterning the conducting polymer electrode on various substrates including plastics is also reported. This approach conveniently provides finely patterned conducting polymer films with νm resolution while maintaining their intrinsic electrical and optical properties such as the surface sheet resistance and the optical transmittance.

Nanocrystalline silicon is a candidate material for fabricating thin film transistors with high carrier mobilities on plastic substrates. A major issue in the processing of nanocrystalline silicon thin film transistors (nc-Si:H TFTs) at ultralow temperatures is the quality of the SiO2 gate dielectric. SiO2 deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (rf-PECVD), and not annealed at high temperature after deposition, exhibits high leakage current and voltage shifts when incorporated into TFT's. Secondary ion mass spectrometry (SIMS) measurements show that the hydrogen concentration (NH) in PECVD oxide deposited at 150°C on crystalline silicon (x-Si) is ∼ 0.8 at. %. This is much higher than in thermal oxides on x-Si, which display concentrations of less than 0.003 at. %. The leakage current density for thermal oxides on x-Si at a bias of 10 V is ∼9×10−6 A/cm2 whereas for 200°C PECVD oxides on nc-Si:H the current is ∼1×10−4 A/cm2. As the temperature of the SiO2 deposition is reduced to 150°C the current density rises by up to two orders of magnitude more. The H which is suspected to cause the leakage current across the PECVD oxide originates from the nc-Si:H substrate and the SiH4 source gas. We analyzed the 300-nm gate oxide in capacitor structures of Al / SiO2 /n+ nc-Si:H / Cr / glass, Al / SiO2 / n+ nc-Si:H / x-Si, and Al / SiO2 / x-Si. Vacuum annealing the nc-Si:H prior to PECVD of the oxide drives H out of the nc-Si:H film and reduces the amount of H incorporated into the oxide that is deposited on top. SiO2 film deposition from SiH4 and N2O at high He dilution has a still greater effect on lowering NH. The leakage current at a 10 V bias dropped from ∼1×10−4 A/cm2 to about ∼2×10−6 A/cm2 using He dilution at 250°C, and the vacuum anneal of the nc-Si:H lowered it by an additional factor of two. Thus we observe that both the nc-Si:H anneal and the SiO2 deposition at high He dilution lessen the gate leakage current.

We are exploring the use of hot-wire chemical vapor deposition (HW-CVD) as an alternative, solvent-free technique to produce compact polyconjugated films from vaporized monomers. This paper will focus on our attempts to deposit polyaniline, a polymer with a wide variety of optoelectronic applications. Infrared and X-ray photoelectron spectra have been obtained to characterize HW-CVD films produced using aniline as a precursor. The aromatic ring structure, essential for the polyconjugated network that leads to semiconducting properties, is largely preserved in our method. The bonding structure is analyzed, and the films are found to have significant metal incorporated from the hot wire. The implications of these results for understanding the polymerization and growth mechanism are discussed.

In this paper we present the effect of the insertion of a non-doped nanocrystalline zinc oxide/buffer layer on the electrical, optical and structural properties of indium tin oxide produced at room temperature by radio frequency plasma enhanced reactive thermal evaporation on polymeric substrates. The electrical resistivity of the ITO films is reduced by more than two orders of magnitude (4.5×10−1 to 2.9×10−3 ωcm). From the Hall effect measurements it is observed that the large decrease associated to the electrical resistivity, is due to the increase associated to the Hall mobility. Concerning the optical properties no effect was observed, being the transmittance in the visible and near the infra red region always higher than 80%.

Flexible, free shape displays are the enabling technology for new robust, lightweight, extremely thin, portable electronic devices. Polymer Light Emitting Diodes (PLED) are especially suited for these applications, due to their fast response time, low voltage, high luminous efficiency and viewing angle performance. On the other hand, PLED displays are extremely sensitive to moisture and oxygen. Substrate materials provided with high performance hermetic and conducting layers are therefore an essential component for manufacturing these flexible devices. Polymer based substrates provide the necessary mechanical flexibility; they also require several thin, brittle, functional inorganic layers such diffusion barriers and transparent electrodes. The structural integrity, dimensional stability and thermal properties of the substrate stack are crucial to insure device functionality and reliability. For polymer-based substrate several effects lead to dimensional variation of the substrates, such as solvent uptake, physical ageing of the polymer base, thermal expansion and stress induced deformations. These effects must be taken into account to successfully perform classic photolithographic steps.

Ink-jet printing is a critical enabling technology for flexible PLED displays, providing a customizable means to dispense solution-based polymers onto a flexible substrate, allowing for multi-color devices. On the other hand, IJP must meet several challenges, especially to comply with industrial applications. For example, accurate landing position of the droplets to form homogeneous hole-transport and electroluminescent layers as well as good wetting characteristic of the substrates must be obtained with reliable high throughput techniques.

Device-quality polycrystalline Ge layers have been grown on flexible poly-ethylene terephthalate (PET) substrates by means of stress-assisted Cu-induced crystallization at temperatures as low as 130°C and employed for fabrication of depletion-mode poly-Ge thin-film transistors (TFTs). These TFTs show an ON/OFF ratio of 104 and an effective hole mobility of 110 cm2/Vs. The stress-assisted crystallization technique has been extended to crystallize SiGe alloys at low temperatures for possible fabrication of poly-SiGe TFTs on plastic. As a result, poly-Ge seeded poly-crystalline SiGe layers with 40% Si content are grown at a low annealing temperature of 180°C in the presence of 0.05% equivalent compressive strain.

Flexible Magnetics encompases the design, fabrication and characterization of magnetic devices and systems built on thin flexible substrates. Although device and system functionality is magnetic in nature, flexible magnetics draws interesting parallels to flexible electronics, especially in the challenge of fabrication on plastic substrates. Some of those challenges include substrate surface quality and maximum processing temperature, tooling issues related to mechanical properties of flexible substrates, adhesion of thin films deposited on plastics, as well as thermal stability of fabricated devices.

One application of flexible magnetics relevant to the information storage industry is magnetic lithography. Magnetic lithography is a process qualitatively analogous to contact optical lithography. Magnetic lithography transfers information from a patterned magnetic mask (analogous to the optical photomask) to magnetic media (analog of the photoresist), and is interesting for applications in rapid, parallel magnetic recording. The magnetic mask consists of patterned magnetically soft material (FeNiCo, FeCo) on a thin flexible plastic substrate, typically Polyethylene Teraphtalate (PET) or polyimide. When uniformly magnetized media is brought into intimate contact with the magnetic mask, an externally applied magnetic field selectively changes the magnetic orientation in the areas not covered with the soft magnetic material. The flexible magnetic mask offers superior compliance to contaminated or nonplanar magnetic media. We discuss nanofabrication challenges of magnetic masks on plastic substrates, including electron beam lithography, electroplating and lift-off processing on the nanometer scale, adhesion of metal thin films on PET and polyimide substrate, and release of plastic films from the rigid substrates used during the processing. We present results on fabricated magnetic masks, and magnetic force microscopy images of the magnetic transition patterns.

Besides fabrication of magnetic nanostructures and devices on plastic substrates, we also present our results on nanoscale patterning of plastic thin film. We will present our results on fabrication of sub-100 nm scale nanochannels in polyimide films, as well as self-assembly of ordered arrays of polyimide nanodots. Nanoscale patterned plastic films are interesting for the potential application in magnetic lithography, as well as for the application in micro- and nanofluidics, due to the mechanical flexibility and biological inertness of plastic materials. We will discuss interesting biosensing systems that may result from the combination of magnetic functionality, electronic control and patterned nanofludic channels on plastic substrates.

Recent developments in our laboratory related to polymer-based light sensors are reviewed. The inherent processibility of the active polymer medium is utilized in the implementation of different designs for the opto-electronic applications. The utility of these devices as sensitive photodetectors, image sensors and position sensitive detectors is demonstrated. The schottky-type layer formation at interfaces of polymers such as polyalkylthiophenes and aluminum accompanied by the enhanced photo-induced charge separation due to high local electric field is tapped for some of these device structures. The sensitivity of polymer-based field effect transistors to light also provides a convenient lateral geometry for efficient optical-coupling and control of the transistor state. The range of these polymer-detectors available with the option of operating in the diode and transistor modes should be an attractive feature for many potential applications.

Temperature dependant I-V characteristics were measured on single-crystalline Si (c-Si) TFTs fabricated inside a location-controlled grain by [.proportional]-Czochralski process using an excimer-laser. At ON-state, temperature the activation energy (Ea) of the drain current drops to a negative value. The field effect mobility ([.proportional]FE) also decreases with temperature with a power of -1.86, which indicates that, the carriers transport are governed by acoustic phonon scattering. At OFF state with a small gate bias, leakage current is dominated by thermal generation, however the Ea was 0.9eV, i.e., near the band gap value of Si. This suggests that the carrier generation centers are not located at the mid-gap states. These distinctive results from a typical poly-Si TFTs are systematically investigated for c-Si TFTs having ECR- PECVD and LPCVD SiO2 gate insulator.