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Why SiNx:H is the Preferred Gate Dielectric for Amorphous Si Thin Film Transistors (TFTS) and SiO2 is the Preferred Gate Dielectric for Polycrystalline Si TFTs

Published online by Cambridge University Press:  10 February 2011

Gerald Lucovsky
Affiliation:
Deptartments of Physics, Materials Science and Engineering,and Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-8202
J.C. Phillips
Affiliation:
Lucent Bell Labs., Murray Hill, NJ 07974
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Abstract

Constraint theory developed for bulk glasses and recently applied to thin films and single crystalline Si (C-Si) dielectric interfaces is extended in this paper to a-Si:H and polycrystalline-Si (poly-Si) dielectric interfaces in TFTs where it provides guidelines for device optimization. The constraining effects of network bonding forces are a linear function of the average bonding coordination, Nav. Nav ∼ 3 separates low-defect density networks as in Si02 (Nav =2.67), from highly-defective networks such as non-hydrogenated Si3N4 (Nay = 3.43). Nay ∼ 3 also separates device-quality from highly-defective Si-dielectric interfaces. These criteria are applied to Si-Si02 and Si-SiNx:H interfaces that are integral components of TFT devices.

Type
Research Article
Copyright
Copyright © Materials Research Society 2000

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References

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