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Process-Induced Strained P-MOSFET Featuring Nickel-Platinum Silicided Source/Drain

Published online by Cambridge University Press:  01 February 2011

Rinus Tek Po Lee ,
Tsung-Yang Liow ,
Kian-Ming Tan ,
Kah-Wee Ang ,
King-Jien Chui ,
Qiang-Lo Guo ,
Ganesh Samudra ,
Dong-Zhi Chi  and
Yee-Chia Yeo
Rinus Tek Po Lee
Affiliation:
eleltpr@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Laboratory, Block E4A #02-04 Engineering Drive 3, Singapore, Singapore, 119260, Singapore
Tsung-Yang Liow
Affiliation:
g0301490@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Laboratory, Singapore, Singapore, 119260, Singapore
Kian-Ming Tan
Affiliation:
g0402599@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Laboratory, Singapore, Singapore, 119260, Singapore
Kah-Wee Ang
Affiliation:
g0404200@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Laboratory, Singapore, Singapore, 119260, Singapore
King-Jien Chui
Affiliation:
g0202516@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Laboratory, Singapore, Singapore, 119260, Singapore
Qiang-Lo Guo
Affiliation:
logq@ime.a-star.edu.sg, Institute of Microelectronics, 11 Science Park Road, Science Park-II, Singapore, Singapore, 117685, Singapore
Ganesh Samudra
Affiliation:
eleshanr@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Laboratory, Singapore, Singapore, 119260, Singapore
Dong-Zhi Chi
Affiliation:
dz-chi@imre.a-star.edu.sg, Institute of Materials Research and Engineering, 3 Research Link, Singapore, Singapore, 117602, Singapore
Yee-Chia Yeo
Affiliation:
eleyeoyc@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Laboratory, Singapore, Singapore, 119260, Singapore
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Abstract

We report the use of nickel-platinum silicide (NiPtSi) as a source/drain (S/D) material for strain engineering in P-MOSFETs to improve drive current performance. The material and electrical characteristics of NiPtSi with various Pt concentrations was investigated and compared with those of NiSi. Ni0.95Pt0.05Si was selected for device integration. A 0.18 μm gate length P-MOSFET achieved a 22% gain in IDsat when Ni0.95Pt0.05Si S/D is employed instead of NiSi S/D. The enhancement is attributed to strain modification effects related to the nickel-platinum silicidation process.

Keywords

electronic materialmicroelectronicsnanoscale
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 913: Symposium D – Transistor Scaling – Methods, Materials and Modeling , 2006 , 0913-D02-04
Copyright
Copyright © Materials Research Society 2006

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References

1 Ghani, T., Armstrong, M., Auth, C., Bost, M., Charvat, P., Glass, G., Hoffman, T., Johnson, K., Kenyon, C., Klaus, J., McIntyre, B., Mistry, K., Murthy, A., Sandford, J., Silberstein, M., Sivakumar, S., Smith, P., Zawadzki, K., Thompson, S., and Bohr, M., Tech. Dig. IEDM, p. 978 (2003).Google Scholar
2 Steegen, A., Stucchi, M., Lauwers, A., and Maex, K., Tech. Dig. IEDM, p. 497 (1999).Google Scholar
3 Scott, G., Lutze, J., Rubin, M., Nouri, F., and Manley, M., Tech. Dig. IEDM, p. 827 (1999).Google Scholar
4 Ito, S., Namba, H., Yamaguchi, K., Hirata, T., Ando, K., Koyama, S., Kuroki, S., Ikezawa, N., Suzuki, T., Saitoh, T., and Horiuchi, T., Tech. Dig. IEDM, p. 247 (2000).Google Scholar
5 Ge, C. H., Lin, C. C., Ko, C. H., Huang, C. C., Huang, Y. C., Chan, B. W., Perng, B. C., Sheu, C. C., Tsai, P. Y., Yao, L. G., Wu, C. L., Lee, T. L., Chen, C. J., Wang, C. T., Lin, S. C., Yeo, Y.-C., and Hu, C., Tech. Dig. IEDM, p. 73 (2003).Google Scholar
6 Joint Committee on Powder Diffraction Standards (J.C.P.D.S), powder diffraction files, Card No. 38–0844.Google Scholar
7 Mangelinck, D., Dai, J. Y., Pan, J. S., and Lahiri, S. K., Appl. Phys. Lett. 73, p. 1736 (1999).Google Scholar
8 d'Heurle, F. M., Peterson, C. S., Baglin, J. E. E., Laplaca, S., and Wong, C. Y., J. Appl. Phys. 55, p. 4208 (1984).Google Scholar
9 Lavoie, C., d'Heurle, F. M., Detavernier, C., and Cabral, C. Jr., Microelectronic Eng. 70, p. 144 (2003).Google Scholar
10 International Techology Roadmap for Semiconductors, Semiconductor Industry Association (SIA), San Jose, CA, (2005).Google Scholar
11 Jin, L. J., Pey, K. L., Choi, W. K., Antoniadis, D., Fitzgerald, E. A., and Chi, D. Z., Thin Solid Films, 504, p. 149 (2006).Google Scholar
12 Steegen, A. and Maex., K., Materials Sci. and Eng. R. 38, p. 1 (2002).Google Scholar
13 Detavernier, C., Lavoie, C., and d'Heurle, F. M., J. Appl. Phys. 93, p. 2510 (2003).Google Scholar