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Limited Reaction Processing of Silicon: Oxidation and Epitaxy

Published online by Cambridge University Press:  26 February 2011

C. M. Gronet
Affiliation:
Stanford Electronics Labs, McCullough 226, Stanford, CA 94305
J. C. Sturm
Affiliation:
Stanford Electronics Labs, McCullough 226, Stanford, CA 94305
K. E. Williams
Affiliation:
Stanford Electronics Labs, McCullough 226, Stanford, CA 94305
J. F. Gibbons
Affiliation:
Stanford Electronics Labs, McCullough 226, Stanford, CA 94305
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Abstract

Limited reaction processing has been used to grow thin, high quality layers of epitaxial silicon, silicon dioxide, and polycrystalline silicon. Multiple layers of these materials were deposited in – situ to demonstrate control of layer thicknesses, interface transition regions, and interface cleanliness. MOS and p-n junction structures were fabricated which exhibit electrical characteristics comparable to those of devices produced by conventional techniques.

Type
Research Article
Copyright
Copyright © Materials Research Society 1986

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