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Improved Reliability With a New Plasma Nh3 Process for 0.35μιη P+ Poly-Gate Nitrided Oxide P-Mosfet's

Published online by Cambridge University Press:  10 February 2011

A. Bravaix
Affiliation:
ISEM Maison des Technologies, PI. G. Pompidou, 83000 Toulon, France.
D. Vuillaume
Affiliation:
IEMN Dept., ISEN, CNRS 9929, BP69 Av. Poincaré, 59652 Villeneuve d'Ascq cedex, France.
D. Goguenheim
Affiliation:
ISEM Maison des Technologies, PI. G. Pompidou, 83000 Toulon, France.
V. Lasserre
Affiliation:
now at MATRA MHS SA, , CP 3008 – La chantrerie, 44087, Nantes cedex, France
A. Straboni
Affiliation:
L.M.P URA 131, 40 Av. du recteur Pineau, 86022 Poitiers cedex, France, ,
M. Haond
Affiliation:
CNET France Telecom, Chemin du vieux chêne, 38243 Meylan cedex, France
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Abstract

The electrical properties and the hot-carrier reliability of P+ poly-gate P-MOSFET's are investigated for advanced 0.35 μπι LDD CMOS technologies. It is shown that surface-channel p-devices with an optimized plasma NH3 nitrided gate-oxide have good barrier properties and electrical performances which lead to a higher hot-carrier immunity in 8nm thick nitrided gate-oxides than in pure oxides using DC and AC experiments. The AC stressing shows that reducing the gate-oxide thickness leads to a larger influence of electron detrapping inducing a stronger influence of donor type interface traps than the usual build-up of negative charges. These distinct degradation mechanisms are less significant in nitrided oxide p-MOSFET's due to the lower lateral electric field leading to a lower amount of trapped charges which are quickly suppressed during subsequent detrapping phases leaving the main influence of the interface traps.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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