An FM-ultra-wideband (UWB) system with a wideband RF carrier (WRC) is proposed for wireless body area network applications. The proposed system can control the channel power by means of an adjustable carrier bandwidth (BW), while the conventional one with a CW carrier (CWC) makes use of peak power control. The implemented WRC system performances have been evaluated for the WRC generation and digital data transmission. In addition, transmission performances have been compared with that of a conventional CWC system by bit-error-rate (BER) tests. For random data of a 29−1 pattern at a data-rate of 64 kbps, in spite of the flexible carrier BW, the WRC system has presented excellent transmission capability compared with that of the CWC system.

We investigated the microstructural evolution of Sn96.4Ag2.8Cu0.8 solder through in situ heating transmission electron microscopy observations. As-soldered bump consisted of seven layers, containing the nanoeutectic lamella structure of AuSn and Au5Sn phases, and the polygonal grains of AuSn2 and AuSn4, on Au-plated Cu bond pads. Here, we found that there are two nanoeutectic lamellar layers with lamella spacing of 40 and 250 nm. By in situ heating above 140°C, the nanoeutectic lamella of AuSn and Au5Sn was decomposed with structural degradation by sphering and coarsening processes of the lamellar interface. At the third layer neighboring to the lamella layer, on the other hand, Au5Sn particles with a zig-zag shape in AuSn matrix became spherical and were finally dissipated in order to minimize the interface energy between two phases. In the other layers except both lamella layers, polycrystal grains of AuSn2 and AuSn4 grew by normal grain growth during in situ heating. The high interface energy of nanoeutectic lamella and polygonal nanograins, which are formed by rapid solidification, acted as a principal driving force on the microstructural change during the in situ heating.

Background: Highly educated participants with normal cognition show lower incidence of Alzheimer's disease (AD) than poorly educated participants, whereas longitudinal studies involving AD have reported that higher education is associated with more rapid cognitive decline. We aimed to evaluate whether highly educated amnestic mild cognitive impairment (aMCI) participants show more rapid cognitive decline than those with lower levels of education.

Methods: A total of 249 aMCI patients enrolled from 31 memory clinics using the standard assessment and diagnostic processes were followed with neuropsychological evaluation (duration 17.2 ± 8.8 months). According to baseline performances on memory tests, participants were divided into early-stage aMCI (−1.5 to −1.0 standard deviation (SD)) and late-stage aMCI (below −1.5 SD) groups. Risk of AD conversion and changes in neuropsychological performances according to the level of education were evaluated.

Results: Sixty-two patients converted to AD over a mean follow-up of 1.43 years. The risk of AD conversion was higher in late-stage aMCI than early-stage aMCI. Cox proportional hazard models showed that aMCI participants, and late-stage aMCI participants in particular, with higher levels of education had a higher risk of AD conversion than those with lower levels of education. Late-stage aMCI participants with higher education showed faster cognitive decline in language, memory, and Clinical Dementia Rating Sum of Boxes (CDR-SOB) scores. On the contrary, early-stage aMCI participants with higher education showed slower cognitive decline in MMSE and CDR-SOB scores.

Conclusions: Our findings suggest that the protective effects of education against cognitive decline remain in early-stage aMCI and disappear in late-stage aMCI.

Background: Agraphia in Korean patients may be different from agraphia in other patients who use alphabetical writing systems due to the “visuoconstructional script” characteristics of the Korean writing system, Hangul. Patients with early onset Alzheimer's disease (EOAD) have a severe degree of hypometabolism in the parietal area, which is known to be involved in processing visuospatial function. Thus, we explored the diverse error patterns manifested in writing single syllables in Korean patients with EOAD.

Methods: A study sample of 35 patients with EOAD and 18 healthy controls (HC) performed a Hangul writing task. We analyzed the erroneous responses of the subjects according to visuoconstructional and linguistic characteristics. In addition, we evaluated the relationship between Hangul writing and the neuropsychological variables as well as the severity of dementia.

Results: When comparing the total number of erroneous responses between EOAD and HC groups, the performances of EOAD patients were significantly worse than those of HC. EOAD patients demonstrated visuoconstructional errors even in the early stages of the disease. Severity of dementia and multiple cognitive domains such as attention, language, immediate memory, and frontal executive functions significantly correlated with the performance of Hangul writing.

Conclusion: Our findings suggest that patients with EOAD exhibit not only linguistic errors but also visuoconstructional manifestations of agraphia, which are associated with cognitive impairments in the multiple domains.

An organic/inorganic hybrid-type nonvolatile memory TFT was proposed as a core device for the future flexible electronics. The structural feature of this memory TFT was that a ferroelectric copolymer and an oxide semiconductor layers were employed as a gate insulator and an active channel, respectively. The memory TFT with the structure of Au/poly(vinylidene fluoride-trifluoroethylene)/Al2O3/ZnO/Ti/Au/Ti/poly(ethylene naphthalate) could be successfully fabricated at the process temperature of below 150°C. It was confirmed that the TFT well operated as a memory device even under the bending situations.

ZnO nanowire (NW) has potential applications for transparent electrodes, gas sensors, nanoscale optoelectronic devices, piezoresponse force microscopy (PFM) and field effect transistors. In general, we have evaluated the electrical properties of nanowire device from I-V curves measured mainly from the bundle-like ensemble structure of ZnO, not individual ZnO NWs. Most applications require details on the electrical mobility of ZnO NWs. Recently, the electrical transport of single ZnO NWs has been studied only from several devices fabricated by electron-beam lithography. However their I-V curves categorized into three types of resistance, i.e., symmetrical, rectifying and linear shapes due to contact problems between ZnO NWs and electrodes, results in contradictory.

In this paper, we manufactured single NW device using an individual ZnO nanowire, of which the junctions were made by Pt deposition using a focused ion beam (FIB), and performed RTA processes. The single ZnO NW device consists of ZnO-Pt, ZnO-Au and Au-Pt junctions. The electrical transport of the single ZnO NW device was investigated by directly measuring the electrical resistance using nano manipulators from cross-sectioned devices. The device showed a typical Ohmic contact in I-V curves and the resistance was decrease with the RTA temperature. The CL (Cathodoluminescence) and EDS in TEM (Energy dispersive spectroscopy in transmission electron microscopy) measurements were also performed to evaluate the crystallinity (defect level) and chemical composition at the center and edge of the cross-sectioned ZnO NWs. From the results, we found that lots of defects were stored at the surface of ZnO NW and impurities at the junction were abruptly reduced. Therefore, the electrical transport of the single ZnO NW device depends strongly on the crystallinity of the ZnO NW and the C content at the Pt junction. From the electrical transport measured on the cross sectioned device, the ZnO-Au junction acted as the fastest transport path among ZnO-Pt, ZnO-Au and Au-Pt junctions in the single ZnO NW device.

Bonding process using indium-silver alloy which can withstand high temperature was investigated at relatively low temperature. We used a thermal evaporator and vacuum coater for making indium-silver contact. From the result of experiment, we observed that indium and silver films which have good quality are formed. From phase diagram of In-Ag alloy, we can find that melting point of these compounds increases with the silver content, i.e. eutectic (144° C) <AgIn2 (166° C) < (300° C) < (670° C) < (695° C). And these compounds are determined by the composition ratio of the source metal. Now we confirmed the thermal characteristics of Indium-Silver alloy is controlled by silver. Consequently we have developed Ag/In/Ag multi-layer composite which has higher melting point than that of normal contact. The melting point of Ag/In/Ag multi-layer is about 700° C. The joint cross-sections are studied using SEM(scanning electron microscopy) and EDX(Energy Dispersive X-rays). From these data, we observed that the composition and microstructure of Ag/In/Ag multi-layer were reliable and this bonding procedure is a better technique compared to the conventional structure of quantum well LED and GaN/Si LED structure was made by using sapphire for substrate and might be good for high temperature electronic devices in the future.

The SrTa2O6 (STO) thin films were prepared by plasma enhanced atomic layer deposition (PEALD) with alternating supply of reactant sources, Sr[Ta(C2H5O)5(C4H10NO)]2 {Strontium bis-[tantalum penta-ethoxide dimethyllaminoethoxide]; Sr(Ta(OEt)5▪dmae)2} and O2plasma. It was observed that the uniform and conformal STO thin films were successfully deposited using PEALD and the film thickness per cycle was saturated at about 0.8 nm at 300°C. Electrical properties of SrTa2O6 (STO) thin films prepared on Pt/SiO2/Si substrates with annealing temperatures have been investigated. While the grain size and dielectric constant of STO films increased with increasing annealing temperature, the leakage current characteristics of STO films slightly deteriorated. The leakage current density of a 40nm-STO film was about 5×10−8A/cm2 at 3V.

A new photo-electrochemical etching method was developed and used to fabricate GaN MESFETs. The etching process uses photoresist for masking illumination and the etchant is KOH based. The etching rate with 1.0 mol% of KOH for n-GaN is as high as 1600 Å/min under the Hg illumination of 35 mW/cm/2. The MESFET saturates at VDS = 4 V and pinches off at VGS = −3 V. The maximum drain current of the device is 230 mA/mmn at 300 K and the value is remained almost same for 500 K operation. The characteristic frequencies, fT and fmax, are 6.35 GHz and 10.25 GHz, respectively. Insensitivity of the device performance to temperature was attributed to the defect-related high activation energy of dopants for ionization and band-bending at the subgrain boundaries in GaN thin films.

An optimized process of Pb(Zr,Ti)O3(PZT) ferroelectric capacitor has been investigated in order to develop a highly scaleable 1T/1C ferroelectric random access memory. The PZT ferroelectric capacitor, Pt/PZT/Pt stack, was formed on the TiO2/SiO2/Si substrate. The PZT thin films were prepared by conventional sol-gel multi-coating method. Physical and electrical properties of the PZT ferroelectric capacitors were characterized by XRD, SEM, TEM and RT6000S, respectively.

It was revealed that the microstructure of PZT thin film is strongly influenced by sol-gel coating process, especially depending on coating methods of the first PZT layer. The second phase was observed in the PZT thin films, which is found to be pyrochlore phase. The size and density of pyrochlore phase were significantly reduced by modifying the coating methods of first PZT layer. Microstructure of PZT thin film capacitors was evaluated in detail along with electrical properties such as remnant polarization, coercive electric field, and dielectric leakage. The sensing Pr window was also introduced for proper sensing margin in IT/1C ferroelectric random access memory. This concept is well verified by 64Kb 1T/1C ferroelectric random access memory.

A new annealing method, a combination of rapid thermal annealing (RTA) and furnace annealing, has been developed to obtain a high quality poly-Si from a-Si deposited by LPCVD. This method produces a large grain poly-Si with good uniformity, which may result from the growth of relatively defect-free nucleus generated at a high temperature by RTA. Poly-Si thin film transistors fabricated by this new annealing method have higher field effect mobility and better uniformity compared with those by the conventional furnace annealing.