Two approaches to preparing oriented crystalline films on amorphous substrates are reviewed briefly: zone-melting recrystallization (ZMR) and surface-energy-driven grain growth (SEDGG). In both approaches patterning can be employed either to establish orientation or to control the location of defects. ZMR has been highly successful for the growth of Si films on oxidized Si substrates, but its applicability is limited by the high temperatures required. SEDGG has been investigated as a potentially universal, low temperature approach. It has been demonstrated in Si, Ge, and Au. Surface gratings favor the growth of grains with a specific in-plane orientation. In order for SEDGG to be of broad practical value, the mobility of semiconductor grain boundaries must be increased substantially. Mobility enhancement has been achieved via doping and ion bombardment.

The formation of silicon-on-insulator structures, by recrystallising polycrystalline silicon films with a dual electron beam technique, has been studied over a wide range of conditions. The quality of the layers has been assessed by examining cross-sections in the SEM and optical microscopy of the surface after a Secco etch. The range of line powers which gives device-worthy single crystal material becomes greater as the sweep speed increases and as the background temperature is reduced. The extent of melting into the substrate in the seed windows and below the isolating oxide was determined from the movement of an arsenic implant. The experimental results are compared to the predictions from a one dimensional model for the heat flow.

We have done experimental and theoretical studies of the origins of facet formation at the solid-liquid interface in laser-beam-melted silicon films. Two laser beams were used to produce a molten zone with a closely controlled thermal profile in a thin single-crystal film of silicon, and the liquid-solid interface was observed in situ. A transition to a faceted structure was found to occur under conditions of near thermal equilibrium. The solidliquid interface was also studied theoretically by means of molecular dynamics simulations, incorporating pair- and three-body terms in the interaction potential. Similarly to the experimental system, the solid-melt interface in the simulated system breaks up into facets defined by (111) planes. The melt region in the vicinity of the faceted planes exhibits a certain degree of ordering due to the influence of the crystalline potential.

Silicon-on-Insulator (SOI) films on SiO2 scan-melted at low velocities (20 to 300 µm/sec) with reduced thermal gradients at the melt-freezing interface are found to have qualitatively different properties from similar films melt-scanned at higher gradients and scan velocities. The transition between the two regimes appears to be abrupt. Scanning at intermediate velocities often results an admixture of patches containing one or the other type of material. The slow scan regime is characterized by long straight non-branched subboundaries having a lateral spacing 50-60 µm, and very small tilt misalignments of 0.1° or less. These slow scan subboundaries are found to consist largely of threading dislocations in contrast conventional subboundaries which are tilt boundaries of up to 3° and typically consist of edge dislocations running in the plane of the film.

Since the introduction of zone-melting recrystallization (ZMR)for silicon-on-insulator (SOI) films, subboundaries (low-angle grain boundaries) have been the major crystalline defects in recrystallized films. By using an improved ZMR procedure, subboundaries have been eliminated over large areas. The improvements include the use of 1-µm-thick polycrystalline-Si films deposited on 2-µm-thick thermal SiO2 film (instead of 0.5-µm-thick Si and SiO2 films), a new encapsulation technique, and improved control of the thermal gradient during ZMR. Recrystallized SOI films without subboundaries contain isolated dislocations with densities <2 × 106 cm−2.

We have designed and experimentally tested, under a wide variety of laser recrystallization conditions, a reliable encapsulation structure that prevents agglomeration and enables recrystallization of SOT films over a 100% wafer area. Our experiments indicate that the wetting characteristics of the structure can also improve the surface planarity of the recrystallized silicon. We also report a dramatic reduction in defect density and the non - occurrence of the characteristic branched subgrain boundary pattern under appropriate conditions of laser recrystallization.

To prepare silicon-on-insulator (SOI) films by graphite-strip-heater zone-melting recrystallization (ZMR), a capping technique must be used to insure wetting by the molten Si zone. We have demonstrated two new capping techniques that result in reproducible wetting without degrading the crystallographic texture of the recrystallized film: annealing SiO2- capped Si films in NH3 and depositing two SiNx layers with carefully controlled compositions on the SiO2 capping layer. Wetting is promoted by the incorporation of trace amounts of nitrogen at the Si-SiO2 interface. Both N implantation experiments and Auger spectroscopy studies establish that the presence of less than a monolayer of nitrogen at this interface is sufficient to insure wetting.

In the preparation of SOI films by Zone Melting Recrystallization (ZMR) a cap layer is necessary to avoid the beading up of a silicon film when it is molten over silicon. This is a consequence of a bad wetting of liquid Si on SiO2. We report the successful application of a plasma nitridation treatment of the capping oxide. We compare the behaviour of the liquid silicon films during ZMR for different capping structures. The modification of the interface is investigated by using Auger analysis. We show that a range of nitrogen accumulation at the interface provides a good wetting.

The microstructure of beam recrystallized silicon-on-insulator (SOI) films is strongly dependent on nucleation and growth processes during zone-melt propagation. In general, the recrystallization takes place along the (100) plane and in the <001> direction and in this case subgrain boundaries form the only major defects in the material. We have, however, identified stable growth regimes that produce predominantly twin boundaries, when the SOl films recrystallize with their surface parallel to the (110) planes. The twin formation process is attributed to growth twinning characteristic for f.c.c. and diamond structures. It has been established that the majority of these boundaries consist of coherent twins. In this manner (110) textured SOl films can be grown which contain almost entirely twin boundaries as structural defects. The crystallography of coherent twin boundaries in SOI films and their dependence on growth parameters is presented.

Laser recrystallization of silicon on an insulating substrate has been carried out by irradiating polysilicon with both an Ar+ laser operating on all lines in the visible and a CO2 laser operating at 10.6 microns. These experiments were carried out over a variety of laser power densities and substrate temperatures. The use of the two lasers allowed for independent spatial control of temperature in both the polysilicon and the SiO2 layers and helped to reduce the strain at the polysilicon - SiO2 interface. We report the successful recrystallization of polysilicon films without substrate heating for two different silicon-on-insulator structures.

A seeded channel approach was developed to avoid the short comings of the conventional SOI structure such as grain or sub-grain boundaries in the channel region, floating substrate effects, etc. In this approach, the gate of each FET is located above its own seed window to insure that single crystalline material is obtained for the channel region. The source and drain regions, however, are located in the recrystallized silicon over Si02 for improved isolation and minimizing junction capacitance. Recrystallization was obtained in 4" silicon wafers by using an Ar laser and a computer controlled X-Y stage with heated substrate holder. Problems encountered in laser recrystallization, such as, reflectivity variations over seed and SOI regions, surface ripples, pittings, etc., were eliminated by optimizing the thin film thickness of the isolation oxide, polysilicon, and the capping oxide. This technology was used successfully to fabricate FET devices using a standard production n-MOS process. Good device characteristics were obtainred using 400Å gate oxide and channel length ranging from 1um to 50um. The measured electron mobility in the channel region is, however still lower than the ideal bulk values.

By using a halogen lamp recrystalization system, we show that a patterning of the underlying oxide of SOI structures allows a high yield of localization of the remaining defects generally encountered in zone melting recrystallization. The influence of the scan speed and grain orientation on the efficiency of the entrainment is investigated. Moreover, we show that a quasi-single crystal can be obtained if a combination of seeding and oxide patterning is used.

The melting and solidification fronts of thin Silicon On Insulator (SOI) films have been observed in-situ. The melting front does not advance continuously but by bursts. This so called “explosive melting” allows to explain the appearance of defects (such as voids and surface roughness) observed in the recrystallized film. The freezing front is observed in the case where a pattern for the entrainment of the defects has been etched in the underlying oxide: we show that the entrainment effect is due to the spatial modulation of the solidification front by the structure. Furthermore, the scan speed influences the morphology of the liquid/solid interface and the defect entrainment efficiency.

Argon laser recrystallization of silicon films deposited on low temperature glass substrates offers the potential for development of large scale matrix addressable displays incorporating on-glass line drivers and logic circuitry. In order to achieve this promise, the challenge of containing molten silicon, at 1685 K, in close proximity to a glass substrate (Corning 7059) which has an annealing temperature of 914 K, must be met. We have successfully recrystallized areas of several squared millimeters of 500 nm thick silicon films without cracking on 7059 glass substrates. This was achieved by the incorporation of multiple film layers interposed between the silicon and the glass substrate, which serve to control the thermal gradients which occur during the recrystallization process. Grains in the recrystallized films are typically 10µm wide and several hundred µm long, achieved using a laser spot size of approximately 70 µµµµm diameter and a scan rate of 15 cm/s. Comparable results were obtained for a wide range of laser powers, from 7.5 to 9.2 W.

In this paper, GaAs SOI consisting of MBE deposited GaAs films on oxidized Si was recrystallized by narrow-zone melting in a RF induction graphite strip heater at a rate of 1–1.2 mm/s. The original grain size of MBE GaAs SOI films is smaller than 800 Å, and the electron diffraction patterns appear as typical polycrystalline rings as determined by SEM and ED, respectively. After zone melting recrystallization, the grain size of GaAs SOI films increases to 1 µm, the prefered ˂111˃ diffraction spots appear apparently, and the carrier concentrations and electron mobility amount to 3×1017cm−3 and 1.1×103cm2/v.s as determined by Hall measurement. The AES Ga/As signal ratio of the GaAs SO before and after recrystallization is the same as that of the GaAs single crystal. The possible application of GaAs SOI to devices is discussed.

Poly-GaAs films have been grown on amorphous insulating substrates by MOCVD technique. The films were analyzed using TEM, X-ray diffraction, AES and ESCA measurements. The results show that poly-GaAs films are flat, bright and close in texture and stoichiometric. The grain size is about 200Å. The film contains trace impurities such as Si,O and C. They are evenly distributed in the film. The poly-GaAs films were crystallized by CW Ar+ laser with a increase of grain size from 200Å to 40 µm. Schottky barrier diodes of good I-V characteristics were made on the laser recrystallized GaAs films.

The InP films with thickness of 1-2 µm and resistivity of 10-10−3Ω-cm were sputtered on oxidized Si substrates heated at about 300°C to form as InP SOI. Using X-ray diffraction, ED, TEM, Hall and RBS, we have investigated the grain size, compositions, thermal stability and electrical characteristics of InP SOI before and after CW Ar+ laser recrystallization. The sputtered InP SOI films appear as polycrystalline and its grain size increases with increasing of irradiated laser power from 5.8 to 7.0 W at a beam diameter of 70 µm. After irradiation at 7 W the single crystal ED patterns are obtained, the mobility and carrier concentrations amount to 103cm2/Vs and 1017cm−3, respectively, and the compositions are stoichiometric.

CMOS/SOS devices and circuits were fabricated in 0.3-µm-thick epitaxial silicon-on-sapphire (SOS) films. Two solid phase epitaxial recrystallization techniques (DSPE* and SPEAR**) reduced the total microtwin concentrations in the Si layers more than ten- fold, while increasing electron and hole inversion layer mobilities between 30 and 45%. Leakage currents were substantially reduced in all SPEAR devices and in n-channel DSPE transistors, with some increase observed for p-channel DSPE devices. Drive currents and subthresholds slopes also showed significant improvement in both n- and p-devices. Propagation delays below 75 ps were obtained for CMOS/SOS inverters with Lef = 0.5 µm. The application of DSPE and SPEAR techniques to 0.3-µm SOS films will extend the scaling of CMOS/SOS to circuits with very large scale integration (VLSI) complexity.

Recent progress in the research of heteroepitaxial SOI structures such as Si/CaF2/Si and Ge/CaF2/Si structures is reviewed. Structural and electrical properties of alkaline earth fluoride films on Si substrates are first discussed. Growth conditions, structural properties, and device applications of the Si/CaF2/Si structures are then presented. It is shown that a predeposition technique, in which a thin Si layer is deposited at room temperature prior to the growth of a thick film at elevated temperature, is effective to improve the crystalline quality and the surface morphology of the film. Usefulness of solid phase epitaxy to obtain high quality films is also demonstrated. Finally, it is shown that the predeposition technique is also useful in formation of Ge/CaF2/Si structures.

One approach to the fabrication of multiple silicon — insulator silicon layers that is compatible with existing silicon batch processing technology is to grow all of thelayers heteroepitaxially in a hydride reactor. We have grown multiple Si—Ins—Si layers using boron phosphide as the insulator. Up to 4 layers of BP—Si havebeen grown on silicon substrates and up to 2 layers have been grown on SOS substrates. MOS integrated circuits have been fabricated on the various Si layers. In general, the individual device quality and the performance of the ICs was lower as the number of layersincreased, however, even ICs fabricated on 4 layers of Si—BP—Si had characteristics comparable with SOS ICs. The growth process for production of the multiple heteroepitaxial films will be described. The characteristics of the ICs will be correlated with the film properties. Other possible candidates for insulators will be discussed.