Introduction

Nowadays, many integrated circuits are operated in the multi-gigahertz range to increase their processing power and data bandwidth. High-speed clock generation is necessary for both RF systems and microprocessor systems. For high-frequency synchronous systems, the clock fluctuation needs to be minimized to prevent race conditions, to shorten the setup time and hold time requirements, and to increase the maximum possible operating speed of clocked systems.

Local oscillators (LOs), key elements in transceivers, are required to down-convert or up-convert RF signals while minimizing degradation of the signal-to-noise ratio (SNR). The LO signal is expected to be an ideal tone, which should be stable and clean and appear as a sharp impulse. Unfortunately, in practical situations, intrinsic noise from devices and noise from the surrounding environment make the LO signal fluctuate. As a result, the LO signal appears with sideband noise as a skirt centered around the impulse in the frequency domain. For wireless applications, this noise performance affects the SNR and is characterized by measuring the phase noise, which is defined as the ratio of the power of the signal at the desired frequency to the power of the signal at an offset frequency. For clocked system applications, jitter is normally used to characterize timing uncertainty of a clock signal in the time domain, which is defined as the deviation of the zero-crossing points from the ideal waveform.

In order to generate a high frequency and stable clock signal, frequency synthesis is necessary.