This paper is a review of the main issues relating to power electronic devices as used (or proposed) for the electric power engineering area. Several applications are described. Costs of the devices are discussed. The future of the area is conjectured in terms of the needed breakthroughs in power electronic devices.

Unique properties of GaN and related semiconductors make them superior for high-power applications. The maximum density of the two-dimensional electron gas at the GaN/AlGaN heterointerface or in GaN/AlGaN quantum well structures can reach 5×1013 cm−2, which is more than an order of magnitude higher than for traditional GaAs/AlGaAs heterostructures. The mobility-sheet carrier concentration product for these two dimensional systems might also exceed that for GaAs/AIGaAs heterostructures and can be further enhanced by doping the conducting channels and by using “piezoelectric” doping, which takes advantage of high piezoelectric constants of GaN and related materials. We estimate that current densities over 20 A/mm can be reached in GaN-based High Electron Mobility Transistors (HEMTs). These high current values can be combined with very high breakdown voltages in high-power HEMTs. These breakdown voltages are expected to reach several thousand volts. Recent Monte Carlo simulations point to strong ballistic and overshoot effects in GaN and related materials, which should be even more pronounced than in GaAs-based compounds but at much higher electric fields. This should allow us to achieve faster switching, minimizing the power dissipation during switching events. Selfheating, which is unavoidable in power devices, raises operating temperatures of power devices well above the ambient temperature. For GaN-based devices, the use of SiC substrates having high thermal conductivity is essential for ensuring an effective heat dissipation. Such an approach combines the best features of both GaN and SiC technologies; and GaN/SiC-based semiconductors and heterostructures should find numerous applications in power electronics.

Silicon Carbide (SiC) is an emerging semiconductor material which has been widely predicted to be superior to both Si and GaAs in the area of power electronic switching devices [1]. This paper presents an overview of SiC power devices and concludes that MOS Turn-Off Thyristor (MTOTM) is one of the most promising near term SiC switching device given its high power potential, ease of turn-off, 500°C operation and resulting reduction in cooling requirements. It is further concluded that in order to take advantage of SiC power devices, high temperature packages and components with double sided attachment need to be developed along with the SiC power devices.

The reliability of press-packed integrated gate bipolar transistors (IGBT) depends on satisfactory contact conditions applied at assembly stage and mantained throughout the service life. The objective of this work is the simulation of the thermo-structural behavior of a multichip IGBT during initial assembly and subsequent uniform thermal cycling using the Finite Element method. A detailed axisymmetric FE model of the 3D-device is developed to assess multi-zone contact conditions. Elastic-plastic material behavior and Coulombian friction on contact surfaces are prescribed. The role of dimensional tolerances on contact conditions is discussed. The thermal cycling associated to accelerated testing is then introduced to determine the contact pressure evolution as well as local stick/slip conditions. The device sensitivity to potential damage initiation due to thermo-mechanical fatigue and/or fretting is addressed.

Localized lifetime control in silicon bipolar devices is presented and discussed. It was achieved by formation of a void layer by He ion implantation. The void formation is reviewed and the void properties are described and carefully considered. Simulations demonstrate the advantages of using localized lifetime control, while the innovative method is applied to fabrication of high speed Insulated Gate Bipolar Transistors.

Diamond based power device structures such as resistor, capacitor, Schottky diode, p-n diode, thyristor, and field emitters are being investigated. Diamond resistors similar to standard thick film components in form and dimension were fabricated of polycrystalline diamond film. Using PECVD (plasma-enhanced chemical vapor deposition) processing to achieve diamond dielectric layers, high power, high energy density capacitors have been built. Despite grain boundaries and defects of polycrystalline diamond film, electronic devices such as field-effecttransistors and Schottky diodes have been developed. We have fabricated micro-patterned microtip arrays with this versatile new diamond technology as electron emitters. This paper will review diamond technology and results of this work.

Early predictions that diamond would be a suitable material for high performance, high power devices were not supported by the characteristics of diodes and field effect transistors (FETs) fabricated on boron doped (p-type) thin film material. In this paper commercially accessible polycrystalline thin film diamond has been turned p-type by the incorporation of near surface hydrogen. Schottky diodes and metal-semiconductor FETs (MESFETs) have been fabricated using this approach which display unprecedented performance levels; diodes with a rectification ratio > 106, leakage currents < l nA, no indication of reverse bias breakdown at 100V and an ideality factor of 1.1 have been made. Simple MESFET structures that are capable of withstanding VDS values of 100V with low leakage and current saturation (pinch-off) characteristics have also been fabricated. Predictions based upon experiments performed on these devices suggest that optimised device structures will be capable of operation at power levels up to 20 W/mm, implying that thin film diamond may after all be an interesting material for power applications.

Single layer diamond and multilayer diamond films consisting of diamond and aluminum nitride are deposited on molybdenum and silicon nitride substrates. Silicon or GaAs device wafers and the diamond substrates are prepared by metallization and bonded using gold-tin eutectic solder. Results of characterization of the bond by thermal cycling, scanning electron microscopy of the cross-section samples and X-ray mapping of the distribution of different elements are presented. Advantages of use of multilayer diamond composite heat spreaders in power semiconductor devices are discussed.

A systematic investigation of high field prebreakdown and breakdown phenomena of AlGaN/GaN Heterojunction Field Effect Transistors (HFETs) is presented. The breakdown process was studied as a function of various parameters such as applied electric field, material layer structure, semiconductor surface conditions, ambient dielectric, and test conditions. Experimental evidence of a breakdown mechanism, distinct from the bulk/subsurface breakdown, namely on-surface breakdown or surface flashover is presented. A practical, unambiguous way of identifying device failure by surface flashover is proposed. Surface flashover between gate and drain contact edges is proposed as the main mechanism initiating premature breakdown in these devices leading to a significant reduction of their power capability.

Junction field effect transistors (JFETs) are attractive for high-temperature or highpower operation since they rely on a buried semiconductor junction, and not a metal semiconductor interface as in a metal semiconductor (MESFET) or heterojunction field effect transistor (HFET), for modulating the transistor channel. This is important since a metal/semiconductor interface often degrades at elevated temperatures, either due to the ambient temperature or to Joule heating at high current levels, while a buried semiconductor junction can withstand higher temperatures. In fact, for proper design, the JFET becomes limited by thermal carrier generation in the semiconductor and not metallurgical degradation of the gate electrode.

In this talk an overview is given of JFET technology based on GaAs, SiC, and GaN. While impressive room temperature, high-frequency, results have been reported for GaAs JFET's with unit current gain cut-off frequencies up to 50 GHz, more work is needed to limit substrate conduction for optimum operation at 300 °C and above. For SiC JFETs, well behaved transistor operation has been maintained up to 600 °C, however, increased frequency performance is needed. More recently, a GaN JFET has also been demonstrated that is promising for similarly high temperature operation but is presently limited by buffer conduction. Future directions for each of these technologies, and potential extension to high power switching devices such as thyristors, will be presented at the conference.

The present status of high-voltage power semiconductor switching devices is reviewed. The choice and design of device structures are presented. The simulated performance of the key devices in 4H-SiC is described. The progress in high-voltage power device experimental demonstration is described. The material and process technology issues that need to be addressed for device commercialization are discussed.

Fabrication of group-III nitride devices relies on the ability to pattern features to depths ranging from ∼1000 Å to > 5 μm with anisotropic profiles, smooth morphologies, selective etching of one material over another, and a low degree of plasma-induced damage. In this study, GaN etch rates and etch profiles are compared using reactive ion etch (RIE), reactive ion beam etching (RIBE), electron cyclotron resonance (ECR), and inductively coupled plasma (ICP) etch systems. RIE yielded the slowest etch rates and sloped etch profiles despite dc-biases > −900 V. ECR and ICP etching yielded the highest rates with anisotropic profiles due to their high plasma flux and the ability to control ion energies independently of plasma density. RIBE etch results also showed anisotropic profiles with slower etch rates than either ECR or ICP possibly due to lower ion flux. InN and AIN etch characteristics are also compared using ICP and RIBE.

Impressive RF power performance has been demonstrated by three radically different wide bandgap semiconductor power devices, SiC MESFET's, SiC SIT's, and AlGaN HFET's. AlGaN HFET's have achieved the highest fmax 97 GHz. 4H-SiC MESFET's have achieved the highest power densities, 3.3 W/mm at 850 MHz (CW) and at 10 GHz (pulsed). 4H-SiC SIT's have achieved the highest output power, 450 W (pulsed) at 600 MHz and 38 W (pulsed) at 3 GHz. Moreover a one kilowatt, 600 MHz SiC power module containing four multi-cell SIT's with a total source periphery of 94.5 cm has been demonstrated.

In this paper we demonstrate the growth of thick SiC epitaxial layers (≥100 μm) of good structural quality at a high growth rate (>100 μm/hr) by controlling the vapor dynamics during conventional physical vapor transport (PVT) process. We propose that our PVT technique be used to ‘repair’ or ‘heal’ commercially available substrates dominated by micropipes, by ‘filling up’ the micropipes through crystal growth inside the micropipe. Extensive experiments performed on thick SiC epitaxial layers grown on Lely substrates indicate that the thick epitaxial layers are of single polytype of high structural quality, with a single peak X-ray rocking curve of less than 12 arcsecs FWHM.

The possibility of single crystal SiC expitaxial growth on freestanding amorphous carbon films (500–1000 Å) as well as thin amorphous carbon layers deposited on mono-crystalline SiC seeds, by conventional physical vapor transport (PVT) technique, is demonstrated. Preliminary experiments indicate that under certain specific growth conditions, 3D SiC single crystals (100 – 600 Å) of different polytypes can be grown on freestanding amorphous carbon layers, with more or less equal probability of formation for each polytype. On the other hand, under low axial temperature gradients (< 30°C/cm), the SiC epitaxial growth on carbon is amorphous in nature. Also, experimental results that demonstrate two-dimensional single crystal SiC epitaxial growth on an amorphous carbon film deposited on mono-crystalline 6H-SiC wafer, is presented. Experiments performed in our laboratory indicate that monocrystalline SiC growth is possible on amorphous carbon layers upto 0.1 μm thickness.

The physical origins of negative fixed charges at the lead glass/silicon interface have been studied. It was found that a thin p-type region is present on the n-type substrate in the PbO-SiO2-Al2O3 glass/silicon system from the punch-through voltage, pinch-off voltage, and SIMS analysis. A new model of the negative fixed charge was proposed from the MIS structure with the surface pn junction.

One possibility of a low temperature joining techniques relies on the bonding of atomically clean surfaces. Results on the application of this method to silicon direct bonding are being presented. Clean surfaces for bonding were prepared by ex situ chemical cleaning with ensuing hydrogen passivation and their subsequent activation by thermal desorption of the hydrogen in ultrahigh vacuum (UHV). In UHV at room temperature, the wafers were gently brought into contact to initiate the bonding process. Without any subsequent heat treatment, the adhesive strength thus achieved was equivalent to the cohesion of bulk silicon: covalent bonds join the two crystals.

The deposition of SiO2 films by plasma-enhanced-chemical-vapor-deposition (PECVD) using tetraethylorthosilicate (TEOS) was studied. MOS capacitors were fabricated on both Si and SiC for this study. Several different sets of experiments were conducted for PECVD deposition according to different growth parameters and the results compared. For Si samples with SiO2 deposited at a substrate temperature 300°C, the C∼V curve gave a flat-band voltage of 1V and a transition slope of 112 pF/V. The dielectric constant of the deposited SiO2 film was 4.2 and the Si/SiO2 interface trap density was calculated to be 1.8×1010 cm−2. The I-V curve showed a leakage current density of l.2×10−9 A/cm2 and dielectric breakdown field strength of 9.2 MV/cm. For SiC samples, the PECVD deposition gave a uniform SiO2 film with a controllable deposition rate of 0.3nm/sec. The refractive index and dielectric constant of the as-deposited SiO2 film were 1.46 and 3.84 respectively. The I∼V curve showed a leakage current density of 2×10−9 A/cm2 and a breakdown field of 4.7 MV/cm.

High-density plasma etching has been an effective patterning technique for the group-III nitrides due to ion fluxes which are 2 to 4 orders of magnitude higher than more conventional reactive ion etch (RIE) systems. GaN etch rates exceeding 0.68 μm/min have been reported in Cl2/H2/Ar inductively coupled plasmas (ICP) at -280 V dc-bias. Under these conditions, the etch mechanism is dominated by ion bombardment energies which can induce damage and minimize etch selectivity. High selectivity etch processes are often necessary for heterostructure devices which are becoming more prominent as growth techniques improve. In this study, we will report high-density ICP etch rates and selectivities for GaN, AIN, and InN as a function of cathode power, ICP-source power, and chamber pressure. GaN:AIN selectivities > 8:1 were observed in a Cl2/Ar plasma at 10 mTorr pressure, 500 W ICP-source power, and 130 W cathode rf-power, while the GaN:InN selectivity was optimized at ∼ 6.5:1 at 5 mTorr, 500 W ICP-source power, and 130 W cathode rf-power.

ScAlMgO4 is a potential substrate for GaN epitaxy. We have compared three different plasma chemistries for dry patterning of ScAlMgO4, namely Cl2−, F2− or CH4/H2-based. Significant etch rates (>1000Å.min−1) were obtained only with Cl2 (and BCl3), and the rates were directly proportional to both ion energy and ion density in the plasma. Since the etching is ionassisted under all conditions, extremely anisotropic sidewalls are produced on patterned features. Of the wet chemistries investigated at 300K, only HF wet chemical solutions were found to etch ScAlMgO4, although HNO3 can be used at ≤150°C for removal of substrate polishing damage. Hydrogen as 2H has been incorporated into ScAlMgO4 by both ion implantation and by exposure to a plasma at 250°C. In the implanted material diffusion begins at ˜500°C and most of the hydrogen is lost by ≤ 750°C. This thermal stability for hydrogen retention is considerably lower than for other substrate materials for GaN epilayer growth, such as Al2O3 and SiC. There is minimal permeation of 2H from a plasma at 250°C (DH ˜5×10−16 cm2·s−1) in ScAlMgO4, and thus unintentional hydrogen incorporation into GaN overlayers should be minimal at typical growth temperatures.