A wireline communication system sends and receives data based on precise timing. Any deviation from the ideal timing, i.e., jitter, has a direct impact on the bit error rate (BER) at the receiver. Figure 7.1 shows a generic block diagram of a wireline transceiver that consists of a transmitter, a channel, and a receiver. The role of the transmitter is to serialize N binary sequences, generated by the core logic, into one binary sequence DTX, and send it reliably over the channel to the receiver. If we assume, for example, that the core logic produces 16 data sequences (i.e., N = 16), each at 500Mb/s, then the transmitter will produce a single binary sequence at 8Gb/s. The channel could be a few meters of cable (e.g., between a computer and a peripheral), a few inches of PCB trace (e.g., between a microprocessor and a memory module on the same board), or a few millimeters of an interconnect in a multi-chip module. In all these cases, the channel tends to attenuate the high-frequency components of the signal, and degrade the received eye both in the voltage domain (vertical axis) and in the time domain (horizontal axis). The received signal timing is further degraded due to the jitter in the transmitter clock (CKTX), which in turn may be caused by thermal noise in the clock generation circuit or by power supply noise. In the presence of all these jitter components, the receiver must be designed so as to recover the transmit bits reliably, e.g., at a BER better than 10-12 or 10-15. In this chapter, we first review various sources of the jitter that limits the BER, and then provide techniques for jitter characterization, jitter monitoring, and jitter mitigation.

As mentioned in Chapter 1, jitter does not always work against performance; there are cases where we can use jitter to improve system performance. We provide two such examples later in this chapter.

Basic Concepts in Wireline Signaling

A wireline transmitter, in its simplest form, sends a non-return-to-zero (NRZ) binary signal to the receiver. The wireline receiver first equalizes the received signal so as to compensate for the channel loss (or equivalently to remove the channel ISI) and then samples the equalized signal, using a recovered clock at the center of the data eye to see whether the sampled value is above or below a threshold.