The technological means now exists for approaching the fundamental limiting scales of solid-state electronics in which a single electron can, in principle, represent a single bit in an information flow through a device or circuit. The burgeoning field of single-electron tunneling (SET) effects, although currently operating at very low temperatures, has brought this consideration into the forefront. Indeed, the recent observations of SET effects in poly-Si structures at room temperature by a variety of authors has grabbed the attention of the semiconductor industry. While there remains considerable debate over whether the latter observations are really single-electron effects, the resulting behavior has important implications for future semiconductor electronics, regardless of the final interpretation of the physics involved. Indeed, the semiconductor industry is rapidly carrying out its own advance, with transistor gate lengths in the 20 nm range in production in 2009 (the so-called 35 nm node).

We pointed out in Chapter 1 that the semiconductor industry is following a linear scaling law that is expected to be fairly rigorous. With dimensions approaching 10 nm within another decade, there is a rapid search for possible new technologies that can supplement Si with the offer of improved performance. However, it is clear from a variety of considerations that the devices themselves may well not be the limitation on continued growth in device density within the integrated circuit chip.