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The consequence of tungsten metal purity on the electrical properties of an annealed MOS gate stack with a lanthanum silicate gate dielectric has been investigated. Optimization of the electrical and physical properties of a device with any given dielectric requires the proper choice of metal gate electrode and capping layer. This study is intended to show the importance of tungsten processing optimization and subsequent effects on the equivalent oxide thickness, fixed charge, and density of interface states of La-Si-O gate dielectric MIS devices. In the experiment, La-Si-O films of physical thickness of 1.6 nm were deposited on a Si substrate, subsequently depositing TaN as the gate electrode and W as a capping layer. A post metallization anneal in flowing nitrogen at 1000°C for short times resulted in widely different measured properties of the MIS devices, dependent on the quality of the tungsten deposited. XRD and SIMS profiles of the gate stacks showed a clear relationship between concentration of oxygen and processing of the tungsten. A 1000°C, 10 sec anneal resulted in an EOT change from 1.1 nm to 2.2 nm on gate stacks with low and high oxygen concentration in the tungsten, respectively. Defect densities decreased with increased anneal temperature and time, and annealing with low oxygen-concentration tungsten resulted in higher effective fixed charge. SIMS data suggests that oxygen in the tungsten diffuses to the Si/La-Si-O interface through the TaN electrode, resulting in the observed differences in the defect densities and EOT.
Zr/Ti an Hf/Ti composite nitrate were developed as single-source precursors for deposition of multi-component metal oxide films. X-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS) analyses confirmed that ZrxTi1-xO2 and HfxTi1-xO2 films were successfully prepared by the CVD technique from these composite precursors. The Zr/Ti nitrate can be taken as a solid solution of the individual Zr and Ti nitrate, and the Zr/Ti molar ratio in as-deposited ZrxTi1-xO2 films is nicely consistent with that of the precursor. The Hf/Ti nitrate appears to be a mixture of the Zr and Ti nitrates and the composition of the as-deposited HfxTi1-xO2 films depends remarkably on the heating time of precursor. Both ZrxTi1-xO2 and HfxTi1-xO2 films exhibit trading-off properties between band gap and dielectric constant, which suggesting that ZrxTi1-xO2 and HfxTi1-xO2 can be the promising candidates for gate dielectric application to improve the scalability and reduce the leakage current of the next generation complementary metal-oxide-semiconductor transistor (CMOS) devices.
The need for nitridation of Hf silicate is controversial. On one hand, it has not been proven that the nitridation is mandatory to have working devices and on the other hand, it is known to increase the charge density. In this paper, we present a detailed comprehensive study of the role and the need for nitridation of Hf-based silicates deposited by Atomic Layer Deposition (ALD). The results are based on a correlation of Fourier-Transformed Infrared Spectroscopy (FT-IR), X-ray Photoelectron Spectroscopy (XPS), High-resolution Transmission Electron Microscopy (HR-TEM) and electrical measurements (gate leakage and mobility).
It was observed that the phase segregation in gate dielectrics is not detrimental for the gate leakage density at room temperature. However, the leakage current is significantly increased at higher temperature. The incorporation of nitrogen was either done by NH3 anneal (at 800C) or by Decoupled Plasma Nitridation (DPN – 25.9kJ). While the DPN or NH3 anneal prevent phase segregation for 50% Hf silicate, only the NH3 anneal helps prevent the phase segregation of Hf-rich silicate. Furthermore, the NH3 anneal increases the interfacial thickness, which produces a very low gate leakage with only 10% loss in mobility at high field. Interestingly, DPN followed by O2 anneal leads to an advantageous phase segregation of the Hf-rich silicate by transforming the silicate in a HfO2/SiO2-like stack.
As a conclusion, not only the phase segregation of the silicate does not always lead to shorted devices, but it can be beneficial in terms of mobility. However, the phase segregation seems to be responsible for an enlarged trap-assisted conduction mechanism at high temperature. But even if the 50% Hf silicates non-nitrided leads to working devices, the incorporation of nitrogen in the stack improves the Jg/CET trends and is therefore beneficial.
We investigated the influence of additional oxygen supply and temperature during the growth of thin Gd2O3 layers on Si(001) with molecular beam epitaxy. Additional oxygen supply during growth improves the dielectric properties significantly; however too high oxygen partial pressures lead to an increase in the lower permittivity interfacial layer thickness. The growth temperature mainly influences the dielectric gate stack properties due to changes of the Gd2O3/Si interface structure. Optimized conditions (600 °C, pO2 = 5·10-7 mbar) were found to achieve equivalent oxide thickness values below 1 nm accompanied by leakage current densities below 1 mA/cm2 at 1 V.
The microstructural and electrical characterizations of RuxTa1-x alloys obtained from Ru-Ta laminates are presented. The films were deposited on SiO2 and HfO2 and capped with TiN to avoid oxidation of the top surface. The alloys were attained by post-anneal thermal treatments in the range of 500-1000 °C in Ar atmosphere. Co-sputtered RuxTa1-x alloys were used as references. In particular, Ru0.4Ta0.6 phase could be obtained when the Ru-Ta laminate was annealed at 1000 °C. The alloying reaction is limited either by the tantalum nitride or oxide formation being the source for Nitrogen the TiN capping used on top of the stack and the Oxygen either the dielectric films or the one stuffing the films after exposure to the atmosphere.
Independent of the Ta content a mid gap work function was obtained. Measured WF's in laminate-obtained alloys and alloys themselves differ from other literature data, where a more n-type like WF are measured, and indicating process dependence. In the present study mid-gap or rather p-type work functions were found, 4.5 eV < WF < 4.9 eV.
Previously, we have reported our application of the zero-bias thermally stimulated current (ZBTSC) spectroscopy technique to study defect states in high-dielectric constant insulator films like tantalum oxide (Ta2O5) with much less parasitic current which can be a serious limitation for the conventional thermally stimulated current (TSC) method. However, a parasitic current can still be observed for ZBTSC because of a small parasitic temperature gradient across the sample. The thermal design of the ZBTSC system can be improved, resulting in zero-temperature-gradient ZBTSC (ZTGZBTSC) which can be used to detect deeper traps than ZBTSC.
We have investigated the impact of a metal gate (TiN) and high-k dielectric (HfO2) on the carrier mobility. We have shown that strong remote Coulomb scattering (RCS) due to charges in the HfO2 layer (either grown by ALD or MOCVD) mostly degrades the mobility at low/medium field. High amount of charges (>1013cm-2) is needed to explain the 30% degradation observed in devices with a thin interface layer. These additional coulombic interactions are effective for bottom oxide up to 2nm. We have developed a RCS model to fully explain the experimental data. The influence of the metal gate is also evidenced. The latter has a significative impact on the Si/SiO2 interface roughness, and may induce some additional coulombic interactions.
The composition and chemical bonding of the first atoms across the interface between Si(001) and the dielectric determine the quality of dielectric gate stacks. An analysis of that hidden interface is a challenge as it requires both, high sensitivity and elemental and chemical state information. We used SR based photoelectron spectroscopies and, in particular, X-ray absorption spectroscopy in total electron yield and total fluorescence yield at the Si2p and the O1s edges to address that issue. We report on results of Hf-oxide prepared by ALD and compare to Pr2O3 / Si(001), and compare the two to the SiO2 / Si(001) system as a reference. For both, Hf-oxide and Pr-oxide thin films we find evidence for the silicate formation at the interface as derived from the characteristic features at the Si2p and the O1s edges.
The electrical performance of hafnium silicate (HfSiOx) gate stacks grown by atomic layer deposition (ALD) has been evaluated in capacitors and transistors. First, scaling potential of HfSiOx layers was studied as function of composition and thickness. It is shown that the equivalent oxide thickness scales down with decreasing layer thickness and increasing Hf-content. The gate leakage (at Vfb-1V), however, is mainly determined by the physical layer thickness. For the same equivalent oxide thickness (EOT) target, the lowest leakage is observed for the layers with the highest Hf-content. Leakage values as low as 1x10-3 A/cm2 for an equivalent oxide thickness of 1.3 nm have been obtained. Second, the thermal stability against crystallization of the ALD HfSiOx has been studied and related to their electrical properties. The thermal stability of HfSiOx decreases with increasing Hf-content that necessitates the use of nitridation. The influence of various annealing conditions on the nitrogen incorporation is also studied. Finally, the effect of HfSiOx composition and postdeposition nitridation is discussed on transistor level. TaN metal gate transistor data indicate that nitridation reduces the gate leakage and that Hf-rich HfSiOx layers show the best scaling potential, i.e., highest performance for the lowest gate leakage.
Hafnium oxide ultra thin films on Si (100) are being developed to replace thermally grown SiO2 gates in CMOS devices. In this work, a specially designed Attenuated Total Reflectance - Fourier Transform Infra Red Spectroscopy (ATR-FTIR) reaction cell has been developed to observe chemisorption of hafnium (IV) t-butoxide onto a Si and Ge ATR crystal heated up to 250°C and under 1 torr of vacuum to observe the initial reaction pathways and species on the substrate surface in real time and under typical process conditions. Chemisorption spectra were compared to spectra of the liquid precursor and to spectra generated by density functional theory (DFT) calculations of liquid, monodentate and bidentate absorbed precursor. An asymmetric stretching mode located at ~1017 cm-1 present in the chemisorbed spectra but not in the liquid spectra indicates that the adsorbed hafnium containing group is prevalent as a bidentate ligand according to calculations. Surface concentration of the chemisorbed species was dependant on the substrate temperature and precursor partial pressure allowing for determination of heats of adsorption which was 26.5 kJ/mol on Si.
We report on the impact of silicon precursor choice on the electrical and physical properties of hafnium silicate (HfSiO) gate dielectrics deposited by metalorganic chemical vapor deposition (MOCVD). Hafnium tert-butoxide (HTB) was used as the hafnium source and silane and tetraethylorthosilicate (TEOS) were used as silicon sources. Elemental depth profiles were measured with sub-nm resolution using medium energy ion scattering (MEIS). For Hf-rich films employing TEOS as the silicon precursor, relatively little Si is incorporated at the bottom interface compared with the top; while using SiH4, a more uniform Si distribution is achieved. These physical differences are then correlated with the electrical performance of transistors employing polysilicon gate electrodes. Transistors incorporating SiH4 based HfSiOx gate dielectrics with low silicon concentrations have lower C-V hysteresis and higher high field mobility than those using TEOS based dielectrics. We demonstrate polysilicon gated transistors which have an electrical thickness in inversion (Tinv) that can be scaled to ~21 A with good leakage reduction when employing nitrided bottom interface layers in combination with optimized HfSiOx dielectrics. Reduced silicon concentration resulted in a lower inversion thickness for a fixed physical thickness contributing to the higher drive currents in transistors.
Atomic layer deposition (ALD) has been successfully used over the years for the deposition of conformal dielectric layers with precise thickness down to the nanometer scale. Therefore, optimization of the growth behaviour of the dielectric is mandatory. Since ALD is a surface sensitive growth technique, determined by the amount of available reaction sites at the starting surface, the impact of various wet chemical and thermal Si treatments on the HfO2 growth was evaluated. Thin SiO2 starting layers, based on wet chemical processing, were prepared by using a diluted peroxide mixture and an ozone/DI-water treatment. The thermally grown oxides were gradually etched by slowly immersing the oxidized Si substrate into a diluted HF solution, creating a thickness range on a single wafer. Our results demonstrate that the HfO2 deposition is more dependent on the thickness of the SiO2 layer than on the chemistry used to grow the oxide layer. For all studied oxides, two regions can clearly be distinguished. First, a linear relationship between the oxide thickness and the amount of deposited HfO2 is seen. Because chemical oxides tend to grow in islands, this trend can be explained by an increase in density of surface OH groups when the oxide grows thicker. When an ellipsometric thickness of ~0.8 nm is reached, saturation of the HfO2 growth is obtained. We believe that, from this thickness on, the starting surface is completely covered with hydroxyl groups, leaving the HfO2 growth only dependent on the ALD process itself. Since both the wet chemical as the thermal oxides are showing the same trend in HfO2 deposition, it can be stated that surface preparations can be selected solely based on their ease of processing. However, the electrical results show that there may be a difference between the ozone based wet chemical oxides and the etched thermal oxides, since the latter seems to possess slightly more leakage current. The electrical results will be discussed in more detail during the presentation.
The effects on metal transport and loss in Hf and La aluminate films deposited on Si induced by rapid thermal annealing at 1000°C were investigated. Decomposition of HfAlO films on Si during rapid thermal annealing was reveled by the decrease of the Hf and Al contents. Metal loss from LaAlO/Si structures was also observed following annealing in vacuum, while strong metal transport and interfacial reaction were induced by annealing in a O2 containing atmosphere. These instabilities were hampered by means of post deposition thermal nitridation in NH3 at temperatures lower than 1000°C performed before the rapid thermal annealing step. The role of nitridation is discussed in terms of the N profiles in the nitrided structures.
In this letter, we report on Work Function (WF) measurements performed at deca-nanometer scale on various metals using Kelvin probe Force Microscope (KFM). We first demonstrated the relationship between the WF value and the grain crystallographic orientation by combining KFM and Electron Back Scattered Diffraction (EBSD) performed over the same Cu area. Once this relationship was established, KFM was used to provide, in addition to WF value, crystallographic properties of TiN PVD films grown on various substrates. Finally we characterized the effect of N2/H2 plasma treatment on the WF of TiN grown by CVD. In the latter case, the modification of the bulk chemical potential by post-treatment was proposed.
Area selective HfO2 thin film growth through atomic layer deposition (ALD) has been achieved on octadecyltrichlorosilane (ODTS) patterned Si substrates. Patterned hydrophobic self-assembled monolayers (SAMs) were first transferred to Si substrates by micro-contact printing. Using hafnium-tetrachloride or tetrakis(dimethylamido) hafnium(IV) and water as ALD precursors, amorphous HfO2 layers were then grown selectively on the SAM-free regions of the surface where native hydroxyl groups nucleate growth from the vapor phase. The HfO2 pattern was readily observed through scanning electron microscopy and scanning Auger imaging, demonstrating that soft lithography is a simple and promising method to achieve area selective ALD. To evaluate the selectivity, the resolution of the soft lithography based method was compared with that of area selective ALD of HfO2 by selective surface modification of patterned silicon oxide obtained using long-time SAM exposure. It was found that the selective surface modification showed much higher spatial resolution and selectivity, an observation consistent with previous studies indicating that highly ordered and densely packed ODTS films were important to achieve complete deactivation.
In this work we have performed Ultraviolet Photoelectron Spectroscopy (UPS) and X-Ray Photoelectron Spectroscopy (XPS) on: (i) 40Å of Ru deposited on 20Å of ALD-HfO2 (Ru-HfO2), (ii) 40Å of Re deposited on 20Å of ALD-HfO2 (Re-HfO2), and (iii) 40Å of W deposited on 20Å of ALD-HfO2 (W-HfO2) in as deposited as well as after 600˚C in-situ anneal exposure. The samples with Ru and Re indicated significant reduction in the oxygen content and shift in the Hf peaks towards higher binding energy after anneal as compared to the as deposited state. The loss of oxygen after anneal was associated with the reduction in the surface work function of Ru and Re measured by UPS. However, the sample with W showed a redistribution of oxygen after anneal leading to the formation of multiple oxides of W having a net higher surface work function. The spectroscopic measurements were correlated with the electrical measurements made on MOS capacitors with Ru metal gates on HfO2 gate dielectric. The results indicated that the oxygen content at metal/high-k interface plays an important role in governing the effective work function of Ru on HfO2 gate dielectric.
A systematic study of magnetron sputter deposition of metal gate is presented. On-wafer probes were used to measure ion current and floating voltage. Charge monitoring wafers was used to evaluate charging damage. C-V measurements showed that the interface trap density of metal gated MOS capacitors was reduced with thicker dielectric layer thickness and with the insertion of ALD deposited buffer layer. Lower pressure, higher sputtering power, and pulsed DC sputtering were found to cause larger plasma damage to the ultra-thin dielectric layer, most likely due to increased energetic particle bombardment as a result of higher plasma density and higher ion and neutral energies.
In this paper, we point out the critical role of oxygen stoichiometry in the solid state epitaxy process used for obtaining 5 A EOT in SrTiO3 gate dielectrics on Si. Incomplete oxygenation of the TiO2 fraction of the amorphous SrO.TiO2 film enhances the inherent tendency of TiO2 to react with Si to yield TiSi2 and SiO2. O2 excess is needed to obtain a crystalline interface after UHV crystallization. The solid state epitaxy process results in heavily oxygen deficient films, whose insulating properties can be recovered by an atomic oxygen treatment.
HfO2-based materials are the leading candidates to replace SiO2 as the gate dielectric in Si-based metal-oxide-semiconductor filed-effect transistors. The ubiquitous presence of water vapor in the environments to which the dielectric films are exposed (e.g. in environmental air) leads to questions about how water could affect the properties of the dielectric/Si structures. In order to investigate this topic, HfO2/SiO2/Si(001) thin film structures were exposed at room temperature to water vapor isotopically enriched in 2H and 18O followed by quantification and profiling of these nuclides by nuclear reaction analysis. We showed i) the formation of strongly bonded hydroxyls at the HfO2 surface; ii) room temperature migration of oxygen and water-derived oxygenous species through the HfO2 films, indicating that HfO2 is a weak diffusion barrier for these oxidizing species; iii) hydrogenous, water-derived species attachment to the SiO2 interlayer, resulting in detrimental hydrogenous defects therein. Consequences of these results to HfO2-based metal-oxide-semiconductor devices are discussed.
In this work we present a rigorous investigation of the negative bias temperature instability (NBTI) recovery process during measurement intervals in comparison to the numerical solution of an extended reaction-diffusion (RD) model. In contrast to previous work, the RD model has been implemented in a multi-dimensional device simulator and is solved self-consistently together with the semiconductor device equations. This allows us to directly use many commonly approximated quantities such as the oxide electric field and the interface hole concentration in a self-consistent manner. In addition, the influence of the trapped charges can be more accurately considered by using a distributed Shockley-Read-Hall interface trap-charge model which has been coupled to the RD model. Thus, due to the self-consistent solution procedure, also the feedback of these charged interface-states on the Poisson equation is considered which influences the observed threshold voltage shift. Experimental data confirm the model which has been calibrated to a wide range of temperatures using a single set of parameters.