Organic devices fabricated with a top metal layer/conductive organic layer/middle metal layer/conductive organic layer/bottom metal layer structure have been reported to demonstrate nonvolatile memory behavior such as an after writing (Ion)/after erasing (Ioff) performance of > 1 × 101 and a response time of ∼10 ns, when the organic conductive layers were AIDCN (2-amino-4, 5-imidazoledicarbonitrile), Alq3 (Aluminum tris(8-hydroxyquinoline)), or α-NPD. We fabricated an organic nonvolatile memory device with a structure of α-NPD/Al nanocrystals surrounded by Al2O3/α-NPD/Al, where α-NPD was N,N'-bis(1-naphthyl)-1,1'biphenyl4-4''diamine. A layer of Al nanocrystals, confirmed by a 1.25-MV high voltage transmission-electron-microscope, was uniformly produced between the α-NPD layers by Al layer evaporation at 1.0 Å/sec on the α-NPD followed by O2 plasma oxidation. We confirmed a conduction bistability of ∼102 and a threshold voltage for a set state of 3 V. Al nanocrystals surrounded by amorphous Al2O3 were formed in the α-NPD. They presented seven different reversible current paths for an electron charge or discharge on the nanocrystals. The current slightly increased with an applied bias from 0 V to Vth (a high resistance state (Ioff)), abruptly increased with an applied bias from Vth to Vp, decreased with an increasing applied bias from Vp to Ve (a negative differential resistance (NDR) region), and slightly increased with an applied bias above Ve. After sweeping the first applied voltage from 0 to 10 V (erase), a second applied bias was swept from 0 to Vp (program), where the current followed a high resistance state (Ioff). Next, a third applied bias was swept from 0 to Vp again, where the current followed a low resistance state (Ion). Surprisingly, the ratio of Ion to Ioff was ∼1×102, which is enough current difference to be nonvolatile memory behavior. These I-V characteristics under a positive applied bias were symmetrically repeated under a negative applied bias. All the current sweeping paths were reproducible and symmetrical for an applied bias polarity. In particular, our device demonstrated multi-level nonvolatile memory behavior. It also revealed the current conduction mechanism for each of its operation regions. We observed that the high resistance and low resistance regions followed space-charge-limited current conduction, the Vth to Vp and VNDR to Ve regions followed precisely thermionic-field-emission current conduction, and the above Ve regions followed space-charge-limited current conduction.