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An experimental scheme for validating the cause of the hysteresis phenomenon in hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) is reported. The different gate starting voltage to the desired gate voltage has been considered to prove an effect of filling an acceptor-like or donor-like state in the interface. The integration time of the semiconductor parameter analyzer (HP4156B) has also been controlled to investigate the effect between the detrapping rate and hysteresis. The experimental results show that the previous data voltage in the (n-1)th frame affects the OLED current in the (n)th frame.
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