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Electrical properties of PIN photodiodes fabricated on the bonded silicon on insulator (SOI) wafers annealed at 900°C for 5 seconds were evaluated in order to investigate the effect of rapid thermal annealing (RTA) on SOI wafers. Traps in the SOI layers with different thicknesses (10,30,100 μm) were investigated using the deep level transient spectroscopy (DLTS) method. In the SOI layer with a thickness of 100 μm, a trap with deep energy level (about Ec-Et=0.55 eV) was observed and the concentration of the trap decreased from 5.0 × 1011 cm−3 to 1.5 × 1011 cm−3 by RTA. For PIN photodiodes on the 100 μm-thick SOI layer, the dark current decreased from 2 × 10−9 A to 6 × 10−10 A, and sensitivity uniformity for a 35 μmφ light spot and spectral responses were both improved by RTA. Lifetimes were obtained from open-circuit voltage (Voc) decay curves for 940 nm and 655 nm light, and they increased from 37 μs to 57 μs and from 47 μs to 62 μs, respectively, by RTA. For thinner SOI layers (thickness=10, 30 μm), PIN photodiodes have good uniformity and low dark current, and their characteristics were not changed by RTA.
The surface properties of silicon are investigated by the noncontact laser (λ=774nm)/microwave method. The effective surface recombination velocity (Seff) at an n+n high-low junction interface is estimated by fitting the experimental decay curve for excess carriers with the theoretical decay curve. The results show that Seg decreases as the dopant concentration increases and that Seff at the n+n high-low junction formed with a dose of 1×l015 ions/cm2 has values lower than 1 cm/s. And it is shown that Scff is inversely proportional to the potential barrier height of the n+n high-low junction. Similar results are obtained using an N2 laser (λ=337.1nm) instead of a laser diode (λ=774nm, 904nm) as a carrier excitation pulse source.
In this study, we evaluated the electrical properties of the bonded silicon-on-insulator (SOI) wafers with lifetime measurements using a non-contact laser-microwave method. We prepared one group that consisted of bonded SOI wafers with different active layer thicknesses (I0,30,100μm) and another group consisting of bonded SOI wafers with different buried oxide layer thicknesses(0,0.01,0.1,0.75μm). Primary mode lifetime (τ1) was measured by the photoconductivity decay (PCP) method using the laser diode (λ= 774nm) as a carrier-injected light source. Steady-state change in the conductivity was measured by the photoconductivity modulation (PCM) method using a He-Ne laser (λ = 633nm) as a carrier-injected light source. τ1 decreases as the active layer thickness decreases. The PCM intensity also decreases with decreasing active layer thickness. Surface and interface recombination rates of the SOI are increased with decreasing layer thickness. The PCM intensity also decreases as the buried layer thickness decreases.
The surface recombination of GaAs which has a high carrier concentration layer (HCCL) formed by Si+ implantation has been investigated using the reflectance microwave probe (RMP) method. The RMP method enables us to evaluate the surface property of GaAs contactlessly and easily. The experimental results of the samples which were implanted with doses ranging from 1.0×1011 to 3.9×1012cm-2 at an energy of lOOke V indicate that the effective surface recombination velocity decreases with dosage because of HCCL formed after the annealing. On the other hand, the results of the samples which were implanted with a dose of 3.9 × 1012cm-2 at energies ranging from 30 to 180keV indicate that the effective surface recombination velocity increases with energy for energies larger than 50keV. We understood the reason by comparing with the numerical calculation results of an effective surface recombination velocity at a high-low junction interface.
Highly accurate X-ray masks are strongly required to establish SR lithography technology. X-ray masks must be produced as accurately as the LSI devices, because a one-toone projection aligner system is used. To minimize the in-plane mask distortion, it is desirable to estimate the value of the stress and the non-uniformity in the membrane fabrication (SiN) process. The values of the stress were estimated from the measurement of the warpage and the calculation. It is very difficult to obtain the stress distribution in the SiN/Si wafer. Thus, we measured the minority carrier lifetime distribution using the non-contact laser/microwave method. The carrier injection was done by a 774nm or 904nm semiconductor laser diode, and their beam was focused to about 500 μmφ. The surface lifetime, τ s, of the SiN/Si wafer with the stress over ˜ 108dyn/cm2 decreased to 60–70% of that of the bare Si wafer. Thus, the contactless laser/microwave system can be adaptable for the characterization in the X-ray mask process.
For the high quality Si Photodetector, the high resistivity epitaxial wafer using the low resistivity substrate were studied. The buffer layer was introduced in the interface, and it was very effective on the crystal quality of the epitaxial layer. Recombination lifetime in the epitaxial layer became very uniform and long even in the interface region which was confirmed by measuring the lifetime depth profiles. Then Si PIN Photodiode was fabricated on the above high quality epitaxial wafer and its optoelectric characteristics was evaluated.
We apply the reflectance microwave probe (RMP) method to characterize the surface condition of the sulfur-treated GaAs. Undoped semi-insulating GaAs wafers are dipped in (NH4)2S or (NH4)2Sx [1<x≦3] after an etching. The intensity of the reflected microwave under He-Ne laser (λ=633nm) irradiation is proportional to the excess carrier density, which strongly depends on the surface condition. The (NH4)2Sx treatment increases the RMP signal intensity, while no significant change in the signal intensity is observed after the (NH4)2S treatment. The signal intensity of the (NH4)2Sx-treated samples is decreased by the annealingyhe results observed in this study are consistent with those previously found with other measurement methods. This method will be able to in-situ evaluate the surface condition of GaAs during the device fabrication process.
<Directly-bonded wafers were characterized using capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements. We also studied silicon on insulator (SOI) wafers with different interfacial oxide thicknesses. In the active layers of the directly bonded wafer, two dominant electron traps (Ec-0.16eV, Ec-0.24eV) were observed at 23 μμμμm from the bonded interface. Both trap densities are almost constant (about 2 × 1011cm−3) at distances larger than about 10 μm. In the substrate, the density of the shallower electron trap increases (about 8 × 1011 cm−3) within about 20 μm from the interface, while the other trap concentration is almost constant and nearly equal to that in the active layers. No trap was observed near the wafer backside. These traps were also observed in the bonded SO1 wafers. Both the trap concentrations depend on the thickness of the bonded interfacial oxide. The shallower trap concentration increases with increasing oxide thickness, and the deeper one decreases.
Silicon-on-insulator films fabricated by the wafer bonding technique were studied with capacitance-voltage (c-V) and deep-level transient spectroscopy (DLTS) measurements. For our experiments, two kinds of SOI wafers were prepared. Many voids were present in one sample (void sample), but few voids were in the other sample (no void sample). Before annealing, two DLTS peaks (E-0.48 eV and Ec-0.38 eV) were observed in the SOI layer of the void sample. For the no void sample, different two DLTS peaks (Ec-0.16 eV and Ec-0.12 eV) were observed. The trap with an activation energy of 0.48 eV was annealed out after 450 °C annealing for 24 h. On the other hand, other traps were annealed out after 450 °C annealing for several hours. During annealing at 450 °C, thermal donors (TDs) were formed simultaneously. In usual CZ sil icon, a DLTS peak of TD was observed around 60 K. In the no void sample, however, a TD peak was observed at a temperature lower than 30 K. This TD was annihilated by rapid thermal annealing. This suggests that the TD with a shallower level was formed in the no void sample after annealing at 450 °C.
Effects of rapid thermal annealing (RTA) with a SiNx encapsulant on molecular beam epitaxial GaAs are studied with deep level transient spectroscopy (DLTS) measurements and x-ray photoelectron spectroscopy (XPS) measurements. The RTA was performed at various temperatures form 800°C to 1100°C for 6sec. The electron trap EL2 is produced by the RTA above 850°C The EL2 depth profile produced after the RTA is fitted with a complementary error function. The SiNx cap layer is more effective to prevent the formation of the EL2 than the SiO* cap layer during the RTA, because the critical temperature of the SiNx cap where the EL2 concentration starts to increase is higher than that of the SiOx cap. Slight increase of the oxidized Ga atoms is observed after the RTA near the cap surface. The enhancement of the EL2 trap is discussed considering the outdiffusion of Ga atoms into the cap layer during the RTA.
Production of midgap electron traps in rapid-thermal-processed (RTP) GaAs with sio2 encapsulant has been studied by deep-level transient spec-troscopy in connection with the rapid out-diffusion of Ga through Sio2. Sio2 films of 50 and 1250 nm in thickness have been deposited on LEC n-type (100) GaAs doped with Si. RTP has been performed at 760 and 910°C for 9 s. The broadened DLTS signal consists of four electron traps with the energy levels of Ec - 0.79, 0.83, 0.78 and 0.81 eV. The depth profiles of the total concentration of four traps coincide with those of the decreased carrier concentration multiplied by 0.14 and 0.054 with RTP at 910 and 760°C for 50-nm-thick samples, respectively. These are 0.29 and 0.026 for 1250-nm-thick samples. This means that the origin of these traps is the Ga vacancy formed by the out-diffusion of Ga since the decrease of the carrier concentration by RTP has been ascribed to the formation of VGa-SiGa complex. However, the observation of the persistent photocapacitance quenching effect indicates that these traps are correlated with the As antisite formed by the migration of As into the Ga vacancy. Four kinds of complex defects including the As antisite are produced by RTP which are complex defects of EL2 group.
Recombination lifetime of a epitaxial layer (epilayer) is automatically measured by using the conductivity modulation technique. A lateral p+-n−-n+ diode test structure on the surface of the epilayer is formed to evaluate the minority carrier lifetime. Depth profiles of the recombination lifetime are obtained from current-voltage curves of a lateral p+-n−-n+ diode and a vertical n+-n−-n+ structure between the substrate and the top surface. We measure the lifetime in epilayers with and without a buffer-layer. In addition, photo-response of photodiodes with and without the buffer-layer is measured. Profiles of the recombination lifetime depend on the thickness of the epilayer but not on the thickness of the buffer-layer. Minority carrier lifetime in the epilayer, and the leakage current and the photo-response of photodiodes are improved by the buffer-layer formation between epilayer and substrate.
Variations of thermal donors (TDs) in highly phosphorus-diffused n-type silicon wafers (diffused wafer) have been studied with deep-level transient spectroscopy and capacitance-voltage measurements. The introduction and annihilation of TDs have been performed with heat treatment at 450°C and rapid thermal annealing (RTA) in the temperature range 600-900°C,respectively. In diffused floating zone-grown (FZ) silicon wafer, TDs were observed. It is thought that oxygen diffuses into FZ silicon during the diffusion process, since no TDs are generally formed in FZ silicon for the low oxygen concentration. The behavior of TDs in diffused wafer corresponded with that in oxygen-rich bulk silicon. TDs were completely annihilated by RTA at 700 and 800°C for the as-diffused wafers and the heat-treated ones at 450°C for 24 h, respectively, and the annihilation rate for the as-diffused wafers was fast, as compare to that for the heat-treated ones. This results may be caused by difference in the total concentration and cluster size of TDs.
Introduction of oxygen during thermal oxidation and production of defects by rapid thermal annealing (RTA) in n-type epitaxial Si layers were studied with deep-level transient spectroscopy measurements. We use oxygen-related thermal donors (TDs) as a monitor for introduction of oxygen in silicon epitaxial layers. It is found that oxygen is introduced from the substrate into the epitaxial layer after thermal annealing. The TD was almost annihilated by RTA at .700°C. However, a shallow trap (Ec−0.073±0.005 eV) was induced by RTA.
A GaAs/InAs heterostructure was characterized by micro-Raman spectroscopy. A 2 μm thick GaAs layer was grown on an (100) InAs substrate by molecular beam epitaxy. The sample was then angle-lapped so that the interface region is exposed on the bevel. At the close vicinity of the interface, GaAs longitudinal-optic (LO) frequency was lower by about 3 cm−1 than at the asgrown surface. The LO shift decreased with increasing distance from the interface. The spectral width did not strongly depend on the position, and thus the shift would be mainly due to strain. A similar experiment was carried out for an InAs/GaAs structure, and a broad peak which was tentatively assigned to the plasmon-LO coupled mode was observed for the InAs layer.
The annihilation of thermal donors in silicon by rapid thermal annealing (RTA) has been studied with deep-level transient spectroscopy. The electron trap AO (Ec – 0.13 eV) observed after heat treatment at 450 °C for 10 h, which is identified with the thermal donor, disappears by RTA at 800 °C for 10 s. However, four electron traps, A1 (Ec 0.18 eV), A2 (Ec – 0.25 eV), A3 (Ec – 0.36 eV), and A4 (Ec – 0.52 eV), with the concentration of ∼1012 cm−3 are produced after annihilation of thermal donors by RTA. These traps are also observed in silicon which receives only RTA at 800 °C. This indicates that traps A1–A4 are thermal stress induced or quenched-in defects by RTA, not secondary defects resulting from annealing of thermal donors.
Effects of rapid thermal processing (RTP) on SiO2/GaAs interfaces have been studied with X-ray photoelectron spectroscopy, capacitance-voltage measurements and deep-level transient spectroscopy. SiO2 films of 50, 200 and 1250 nim thickness have been deposited on GaAs. RTP has been performed at 760 and 910°C for 9 s. The rapid diffusion of Ga through the SiO2 film occurs, and the As loss and the formation of the As layer near the interface are observed. The decrease of the carrier concentration occurs in all RTP samples. Five electron traps EAI (Ec – 0.27 eV), EA2 (Ec – 0.32 eV), EA3 (Ec – 0.47 eV), EA4 (Ec – 0.58 eV) and EL2 (Ec – 0.78 eV) are produced by RTP. It is considered that the production of the trap EL2 is closely related to the Ga outdiffusion into the SiO2 film and the As indiffusion from the pile-up of elemental As near the interface. Effects of SiO2 film thickness on RTP-SiO2/GaAs are also reported.
Effects of rapid thermal processing (RTP) on SiO2/GaAs interfaces have been investigated with Auger electron spectroscopy and X-ray photoelectron spectroscopy. SiO2 films of 100, 175, 200 and 1250 nm thickness have been deposited on liquid encapsulated Czochralski-grown (100) n-type GaAs wafers by the RF sputtering method. RTP has been performed at 800°C for 6 s. For comparison, conventional furnace processing (CFP) has also been performed at 800°C for 20 min for 200-nm-thick SiO2/GaAs. The Ga is observed on the outer SiO2 surface for RTP samples as well as CFP samples. This indicates that the outdiffusion of Ga occurs after only 6 s at 800°C even through 1250-nm-thick SiO2 films. The depth profile of Ga reveals the pile-up of Ga on the outer SiO2 surface for both RTP and CFP samples. The amount of Ga on the outer surface gradually increases in the thickness range 1250 to 175 nm. The As is also observed on the outer surface. The amount of Ga and As on the outer surface rapidly increases at 100 nm thickness. Electron traps in RTP samples have been studied with deep-level transient spectroscopy. Different electron traps are produced in GaAs by RTP between 100-nm- and 200-nm-thick SiO2/GaAs. It is thought that the production of different traps by RTP is related to the amount of Ga and As loss through SiO2 films from GaAs.
Rapid thermal processing (RTP) using halogen lamps for a Si-doped molecular beam epitaxial (MBE) n-GaAs layers was investigated by deep level transient spectroscopy. RTP was performed at 700°C, 800°C and 900°C for 6 s. Two electron traps NI ( Ec-0.5-0.7eV) and EL2 (Ec - 0.82 eV) are produced by RTP at 800 and 900°C.The peculiar spatial variations of the Nl and EL2 concentration across the MBE GaAs films are observed. The larger concentrations of the trap N1 and EL2 are observed near the edge of the samples, and the minima of N1 and EL2 concentration lie between the center and the edge of the sample. It seems that these spatial variations of N1 and EL2 concentration are consistent with that of the thermal stress induced by RTP. Furthermore, the EL2 concentration near the edge of the sample is suppressed by the contact with the GaAs pieces on the edge around the sample during RTP.
Defects in high-resistivity neutron transmutation doped (NTD) silicon without annealing were characterized by optical current DLTS with a bipolar rectangular weighting function using a GaAs LED. The DLTS method with a bipolar rectangular weighting function was also described. Two clear peaks labeled A and B were observed in addition to unresolved peaks due to overlaps of DLTS signals of several defects. The thermal emission activation energies of defects A and B were 0.15 and 0.50 eV, respectively. The DLTS signals of these defects were broader than the calculated ones. This indicates the clustered nature of defects produced by fast neutron irradiation. However, the fact that the characteristic peaks were observed suggests that the material state of high-resistivity NTD silicon is crystalline but not amorphous.