The junction field-effect transistor (JFET, also called the JUGFET or junction unipolar gate FET) is the first field-effect device produced before being supplanted by the MOSFET. Even today though its use is limited, the JFET is still used in specific low-noise applications and in new applications in power electronics with new architectures and new materials (e.g., SiC). Just like the junctionless FET biased below the flat-band, the JFET operates in depletion and the current flows in the volume, not at an interface. However, unlike the junctionless FET, the JFET has no gate-insulator layer i.e., there is no semiconductor-insulator interface. This could result in low-frequency noise, which mainly originates from interface traps, and is a clear advantage. Similarly, surface-roughness scattering [183], which degrades mobility, is alleviated to a great extent.

Despite the long use of JFETs in discrete electronics, physics-based compact models today still adopt a conservative approach and deal with the so-called fulldepletion approximation where the deep-depletion regime is essentially modeled empirically. Today, FET compact models [183–186] use regional approximations bridged with smoothing functions. For instance, Sansen and Das [184] adopted a MOSFET-like approach to interpolate the subthreshold, quadratic, and linear modes of operation. Semiempirical log-exponential functions have also been introduced to ensure a smooth transition across the pinch-off domain [184], a technique also used in [187, 188].

This chapter discusses a unified charge-based model for double-gate JFETs addressing fundamental DC, AC, and noise characteristics. The central element considers the JFET as a junctionless FET with a negligible insulating layer i.e., a junctionless FET with an infinite gate capacitance. As for the double-gate junctionless FET, the physics-based model for the JFET will cover all regions of operation, with the exception of accumulation, which is not compatible with the device architecture (forward-biasing of the gate-to-channel pn junctions).

Principle Operation of the JFET

Like the junctionless FET, the JFET has no source and drain pn junction and the channel consists of a highly doped semiconductor layer. However, a major difference exists between these two devices: whereas the junctionless FET has an insulating layer between the channel and the gate electrode(s), in JFETs this role is played by a reversed biased gate-to-channel pn junction i.e., the gate is highly doped to avoid depletion into the gate.