The analog-to-digital converter (ADC) is one of the key components in modern radio front-end design. Real-world ADC components always have certain trade-offs in performance which have to be taken into account. One reason for that is the rather slow development of ADCs compared to other technical achievements in radio technology [22], [33]. The fundamental trade-offs are illustrated in Figure 15.1. Power dissipation is a very important aspect especially in mobile devices, but low-power ADCs tends to have low resolution and sampling rate. On the other hand, if high resolution is required, it usually means that the sampling rate of that high-precision ADC is not very high.

Very high requirements for both the sampling rate and resolution are set by software defined radios, where most of the selectivity and other functionalities are implemented with digital signal processing [21], [32]. In other words, ADCs have to digitize high-bandwidth signals with large dynamic range. Figure 15.2 illustrates why high resolution is needed to cope with high signal dynamics. Before analog-to-digital conversion the signal has to be scaled properly to avoid overshooting the voltage range of the ADC [4]. If the overall waveform to be digitized consists of several signal bands with different power levels, strong signals result in fewer quantization levels that can be used for weak signals. This means that the weak signals suffer from quantization noise more than they would if there were no strong signals present at the same time.