Experimental measurements of the spatial distribution of the spontaneous emission produced inside the cavity of a 4° 980 nm tapered laser are presented and compared with the results of a 2.5 D half-space, hot-cavity simulation. A custom device with a windowed n-contact was designed and fabricated for this work. The effectiveness of this windowed contact was investigated and appears to be satisfactory. The measurement system for photo- and electroluminescence microscopy imaging was quantitatively calibrated with an error of < ±15%. Good agreement between the experimental and simulated results are presented, with an error of ~ 6% in the carrier density at the output facet.

Results of quantitative spectroscopic analysis of packaging-induced strain in In0.06Ga0.86Al0.08As/Ga0.7Al0.3As/GaAs high-power ‘cm-bars’ diode laser arrays are presented. Theoretically, the influence on the results of particular device structure properties, such as intrinsic strain, is analyzed. We compare these theoretical results, which are based on a unaxial stress model, with photocurrent data. For In-soldered devices on copper heatsinks, we find a strain difference of (0.050 ± 0.015)% between edge and center of the device. Almost complete strain-relaxation toward the device edges is experimentally demonstrated. The general approach is also applicable to the analysis of all data that refer to changes of the electronic bandstructure, such as absorption and photoluminescence.

The degradation behaviour of two InGaAs/AlGaAs laser structures differing only in the Zn doping concentration of the p+ GaAs contact layer has been compared. The ageing tests used in this comparison are performed on lasers with Anti-Reflection (AR) coatings on both facets, so as to increase the carrier density in the quantum well and the gradual degradation rate. This kind of ageing test has been discussed in a previous paper, where a possible effect of Zn diffusion was suspected. The defects generated during ageing are studied by Low Temperature (80 K)—Spectrally Resolved Cathodo-Luminescence (LT-SRCL), Cathodo-Luminescence Imaging (CLI) and Transmission Electron Microscopy (TEM). The impact of the acceptor concentration in the contact layer is thus clarified.

A spectroscopically-resolved photoluminescence microscopy technique for the optical study of semiconductor laser diodes is described. The system has been developed by incorporating a twin etalon tuneable filter with a spectral width of 0.6 nm into an existing photoluminescence microscopy imaging system. The design calculations used to make the experimental apparatus are compared with results from the developed system and show reasonable agreement. The study of packaging-induced strain and defects in high-power laser diodes is used to illustrate this technique. Initial results are presented and compare well with an existing technique, micro-photoluminescence spectroscopy. The results show that shifts (< 1 nm) in the peak photoluminescence wavelength can be observed in regions with defects and/or different soldering-induced strain. Luminescence shifts as large as 15 nm in the region around a dark line defect are observed and these cause a significant disturbance in the strain field in the adjacent regions, where luminescence shifts as large as 5 nm are observed.

A case study of backside failure analysis is performed on failed MMIC ASIC devices sealed in SOP packages. The use of Benzocyclobutene (BCB) as a dielectric material, which is etched during wet etch front-side decapsulation, motivated the proposed backside approach. Due to the transparency of the GaAs substrate to near infrared wavelengths, innovative optical defect localization techniques can be used. In this paper we present the successful application of Thermal Laser Stimulation (OBIRCH, TIVA) to rapidly, non-destructively and precisely localize the defects through the GaAs substrate. Backside delayering allowing defect observation and revelation is also discussed. Finally, an electrical interpretation of the failure and the corrective actions are presented.

Scanning capacitance microscopy (SCM) has been applied to microscopic characterization of electrical properties of silicon-on-insulator (SOI) wafers. Two kinds of capacitance-voltage (C-V) methods have been proposed for separately characterizing the electrical properties of a gate oxide, an SOI layer, a buried oxide (BOX) layer, a Si substrate, and their interfaces: (i) a front-gate C-V method whereby the electrical properties of the gate oxide and front SOI (the gate oxide/SOI) interface can be characterized, and (ii) a back-gate C-V method for the characterization of the electrical properties of the BOX layer, back SOI (the BOX/SOI) interface, and the BOX/Si substrate interface. Furthermore, SCM images of the sampled SOI wafer have been obtained for visualizing the microscopic spatial distribution of electrical properties of SOI wafers by using the proposed C-V methods. These SCM images revealed the fluctuation in the oxide charges and interface traps. SCM has been demonstrated to be an effective tool for microscopic electrical characterization of SOI wafers.

The kinetics of “metal-acceptor” pairing in boron-doped multicrystalline samples are investigated by means of contactless lifetime measurement. The case of FeB and CrB pairs is discussed and the influence of extended defect is evidenced for FeB. It is found that the reassociation of the “metal-acceptor” pairs is fast immediately after the dissociation and then slows down for several days. The results allow the identification of mixed contamination by Cr and Fe.

The room-temperature diffusion of evaporated Fe atoms into Si and silicon-on-insulator (SOI) materials has been studied by means of the Kelvin-surface photovoltage (SPV) method. The contactless and imaging feature of this technique enabled us to visualize the evidence of the Fe diffusion by using a single sample partly deposited with Fe. The image contrast in the regions between deposited and non-deposited with Fe was clearly observed in the SPV measurements, even after the thin Fe evaporated layer was completely removed off from the SOI surface. In addition, this contrast can be observed down to about 80 nm from the top surface. This result indicates that the Fe atoms can be soluble in the Si layer at room temperature, when Fe atoms are introduced by the vacuum evaporation. Furthermore, the time variation of the depth profile of Fe contamination was also discussed. Our results suggest that the evaporated Fe atoms diffused into the Si layer and dissolved in some form as a recombination center at room temperature.

The behaviour of nickel (Ni) contamination in silicon-on-insulator (SOI) wafers has been characterized by the Kelvin method combined with surface photovoltage (SPV) measurements. In order to characterize the SOI wafers contaminated with Ni atoms, we used the “patterned” separation by implanted oxygen (SIMOX) wafers with partially no buried oxide (BOX) region, which acts as an opening of the top-Si layer to the substrate. It is found that the smaller size of patterned SIMOX area help the gettering of Ni atoms in the top-Si layer through the openings to the substrate because of its shorter lateral migration distance for Ni atoms. In addition, it is found that the intensity of SPV for the SIMOX areas increases with increasing a line width of the openings because of its wider vertical diffusion path away from the top-Si layer toward the substrate. These results clearly suggest that the Ni atoms in the SOI layer even with the underneath BOX layer can diffuse laterally and escape to the bulk region through the BOX-less region.

In this paper, we present a non-contact C-V technique for ultra-thin dielectrics on silicon. The technique uses incremental corona charging of dielectric and a measurement of the surface potential with a vibrating capacitive electrode. A differential quasistatic C-V curve is generated using time-resolved measurements. The technique incorporates transconductance corrections that enable corresponding ultra-low electrical oxide thickness (EOT) determination down to the sub-nanometer range. It also provides a means for monitoring the flat band voltage, VFB, the interface trap spectrum, DIT, and the total dielectric charge, QTOT. This technique is seen as a replacement for not only MOS C-V measurements but also for mercury-probe C-V. In addition, EOT measurement by the corona C-V has a major advantage over optical thickness methods because it is not affected by water adsorption and molecular airborne contamination, MAC. These effects have been a problem for optical metrology of ultra-thin dielectrics.

The interface or surface recombination velocity is a critical and important parameter in many device applications. In this work, we have developed and applied a contactless microwave technique, which in combination with a continuously tunable pulsed light source, is able to probe the excess carrier lifetime in the surface and bulk regions of a semiconductor wafer. The technique is called resonant coupled photoconductive decay (RCPCD) and has been described by the authors in the literature. For strongly absorbed light, the initial (t = 0) decay time is a strong function of the absorption coefficient, α, as well as the bulk lifetime. The effective bulk lifetime is a well-known function of the two surfaces (interfaces) and the true bulk lifetime. The effective bulk lifetime is measured by using very weakly absorbed light, or by measuring the asymptotic decay rate of strongly absorbed light. The latter occurs after diffusion has produced a quasi-equilibrium condition in the wafer. For asymmetric surfaces (such as a wafer polished on one surface only), the measurement with strongly absorbed light is made at both wafer surfaces. We have solved simultaneuously three nonlinear equations, and the solutions provide values for the three unknowns S1, S2 and τ(bulk). Several examples of the technique will be demonstrated for silicon wafers.

The Ultimate surface photovoltage method of minority carrier diffusion length measurements reffered to as Ultimate SPV, replaces a sequential “one wavelength at a time” approach with simultaneous illumination with the entire set of wavelengths. In this multiwavelength beam, each monochromatic component is chopped with slightly different frequency. This enables simultaneous monitoring of all component SPV signals corresponding to different wavelengths using multi-frequency signal processing. The amplitude and phase of each component signals are then analyzed and used to calculate the diffusion length and surface lifetime. In-flight Ultimate SPV measurement, whereby the wafer continuously moves under SPV probe, is used for fast whole wafer mapping. In addition to speed advantages, Ultimate SPV offers a fundemental accuracy advantage due to elimination of differences in wafer condition during sequential illumination with individual wavelengths. High-speed measurements make it possible to add additional wafer treatments and perform multi-mapping required for separation of Fe and Cu in the silicon bulk. Wafer mapping in time of 2 minutes realized with Ultimate SPV is critical for monitoring of cobalt in silicon.