The buffer of standard solar cells restricts the "surface recombination" at the front side. Some typical cell properties linked to the buffer are exposed by numerical simulations: The "blue snake" appearing in small-signal photocharacteristics, the electron inversion layer, the reverse field peak and the satellite space-charge dipole layer. It is possible to base a simulation on the roots of an algebraic equation.

This paper demonstrates that the incorporation of an unoptimized, wide band gap a-SiC:H layer near the p-type emitter layer in addition to a graded bandgap ”buffer” layer, leads to improved fill factors and open circuit voltages, in spite of the increased number of recombination sites at the p/i heterojunction. The as deposited as a function of a-SiC:H thickness shows an optimum of 10.5 % at a thickness of 10 – 20 Å. We have further improved this type of cell by incorporating a reverse carbon graded p-type layer and have thus achieved efficiencies in excess of 11.0 %. The cells are all amorphous and do not comprise antireflective coatings or enhanced back reflectors. A new defect engineering scheme to accomplish enhanced stabilized efficiencies of amorphous silicon solar cells is also proposed here.

Recent efforts to optimize undoped, glow-discharge hydrogenated amorphous silicon-carbon alloys (a-SiC:H) with 1.9-2.0 eV bandgaps for solar cell applications are reviewed. Hydrogen dilution coupled with relatively low substrate temperatures (below 200 °C) have led to great improvements in the optical and phototransport properties of a-SiC:H films. The issue of alternative carbon feedstocks other than methane (CH4) will be explored. The improved a-SiC:H alloys have resulted in solar cells with high open circuit voltages (V∞ > 1.0 volt) and high fill factors (> 0.7). Further, the a-SiC:H solar cell instability upon prolonged light exposure has been much reduced. Correlation will be made between the properties of bulk undoped a-SiC:H films and the performance of p-i-nsingle junction solar cells using corresponding a-SiC:H thin i-layers.

Small-angle x-ray scattering (SAXS) measurements were made on a-SiGe:H alloys to study microstructure on the nanometer scale as a function of Ge content, and the results were compared with representative single-junction solar cell properties. Samples consisting of only the i-layer were used for SAXS. Above a Ge content of 20 %, a significant increase in SAXS was seen. From measurements made with the samples tilted relative to the incident x-ray beam, the increase in scattering is attributed to the appearance of elongated low density regions in the film, modeled as ellipsoidal microvoids, which are preferentially oriented perpendicular to the film surface and may be related to columnar-like microstructure. Flotation density measurements support the presence of low density regions. Initial and light-degraded measurements on corresponding solar cell structures do not show a correlation between SAXS and initial cell properties; there is, however, some evidence that the light-induced degradation is higher for cells with larger amounts of SAXS-detected microstructure and this needs further investigation.

The quality of a-SiGe:H film was improved by considering the effects of substrate temperature and deposition rate on film properties. Accurate measurement of the optical gap and the film composition of Si, Ge and H made it possible to formulate the optical gap using a linear function of bonded H content (CH) and Ge content (CGE). It was found for the first time that, when the optical gap is fixed to a certain value, the optimum compositions of CHAand CGe exist for high-quality a-SiGe:H. Based on these, we obtained the world's highest conversion efficiency of 3.7 % under red light (AM-1.5, 100mW/cm2 through an R65 filter which allows passage of longer wavelength (>650nm) light) for a 1cm2 a-SiGe single-junction cell. Long-term stability of the cell was also improved.

For a-Si:H solar cells a clear correlation exists between the defect density in the i-layer and cell performance. For cells with a-Si,Ge:H alloy, i-layers, on the other hand, the effect of the properties of the i-layer and its interfaces on cell performance is under debate. To address these questions we light-soaked to saturation and measured a-Si,Ge:H films and cells, and numerically modeled the cell performance using film properties as model inputs. We study three cells with the structure Glass/textured SnO2/p+ a-Si,C:H/i a-Si,Ge:H/n+ a-Si:H/ZnO/Ag. The i-layers are of uniform composition, 150 nm thick and have Tauc gaps of .1.40, 1.46 and 1.50 eV. We modeled the cells with AMPS, a numerical model solving the Poisson equation and the continuity equations for electrons and holes. The defect density in the 1.40 eV film stays constant during light soaking, while the densities in the 1.46 eV and 1.50 eV films rise. The efficiency of the 1.40 eV i-layer cell stays constant, while it drops in the cells with the 1.46 eV and 1.50 eV i-layers. Using the currently accepted input parameters to the model, we obtain cell performances substantially above the experimentally observed values.

In this paper, we discuss the appropriate design conditions and fabrication technology for graded bandgap solar cells in a-Si:H and a-(Si,Ge):H. In particular, we show that by carefully designing the buffer layers and the placement of the graded gap in the i layer of a p-i-n cell, one can fabricate a-Si:H solar cells which are more stable than standard design solar cells. Similarly, appropriate considerations of device physics and electric field profiles in devices made from a-(Si,Ge):H alloys can result in high performance a-(Si,Ge):H cells . We also show that using significant H dilution during growth of a-(Si,Ge):H layers and cells results in both films and devices of high quality and reproducibility.

Junction capacitance measurements have been used by many researchers to study the density of states in the mobility gap of hydrogenated amorphous silicon. However, the data analysis methods used for these studies are based on approximate analytic models which may not always be appropriate. In order to understand better the experimental method and the models, we have performed simulations using a numerical simulator which can calculate the complete time-dependent response of an amorphous semiconductor device. The current in a device is simulated as a function of time when a small sinusoidal voltage applied in addition to a DC bias voltage. The out-of-phase and in-phase components of the sinusoidal part of the current are used to calculate the capacitance and series resistance, just as they measured in an experiment. The results of simulated experiments at different temperatures are shown.

The optimization of the back contact reflectivity for thin film a-Si:H solar cells has been performed. The results of optical calculations show that a-Si:H/TCO/Metal interfaces with a proper TCO thickness reflect much more than their a-Si:H/Metal counterparts. We compared solar cells which were deposited on a flat substrate with different back contacts. The back contacts consisted of a metal layer (aluminum, silver/aluminum) or combined TCO/metal layers (TCO/Al, TCO/Ag/Al). The same was done with solar cells which were deposited on a textured substrate. The solar cells with a TCO/metal back contact showed not only a significantly increased short-circuit current density but also an increase in the spectral response. The cells with TCO/Ag/Al back contact showed the best result.

We present the results of a series of numerical study of a-Si:H solar cells on different V- grooved substrates. The light absorption profiles were calculated by taking into account the V-groove inner reflection and the reflection at the glass/air interface. These profiles were used for modeling the performance of solar cells with the 1-D Amorphous Semiconductor Analysis (ASA) computer package, which has been developed in our laboratory. The J-V characteristics under AMI.5 and the external quantum efficiency axe simulated for V- grooves with different tilt-angles (0 degree for flat substrate). Results show that effective light trapping occurs for V-grooves with tilt-angle larger than 21 degrees.

Electroluminescence studies in a-Si:H p-i-n devices have been made as a function of i-layer thickness (0.4 - 10 (μm), temperature (80 -300 K) and applied electric field (2xl03 – lx105 V/cm field across the i-layer). In particular, the spectral emission and lifetime distributions have been determined. With increasing temperature, there is a shift toward defect luminescence (0.9 eV) in all samples as found in photoluminescence. However, thicker samples (> 2.0 μm) show significantly more main band emission (1.2 eV) than thin samples. This trend is particularly true at higher applied voltages. Further, in thin samples, the lifetime distribution peaks at 10-6 sec in whole temperature range while in thick samples at lower temperature (< 250 K) the lifetime distribution is double peaked at 10-6 sec and at 10-3Sec.

In this paper we present experimental and simulation results of the transient response of amorphous silicon (a-Si) thin film transistors (TFTs) over many orders of magnitude in time after the application of a voltage pulse to the gate. In general three regimes are observed by plotting drain current versus the logarithm of time. At times longer than the carrier transit time and extending up to 1 - 100 msecs, the current rapidly decreases due to trap filling, after which it then slowly decays up until defects are created in the silicon channel when it then finally decays more rapidly again. Our simulation results are in good agreement with the data for the short time trap filling regime, as a function of both gate bias and stress condition. Measurements at elevated temperatures show that the middle slow decay regime is caused by charge injection into interface states or the gate dielectric. Finally we also demonstrate that this slow decay regime does not occur in nin diodes, confirming that it is not caused by defect generation in the a-Si, and is instead related to the presence of the dielectric in a TFT.

We report the use of heavily-doped n-type μc-Si as a source and drain contacts in a-Si:H TFTs. Dual-layer dielectrics comprised of SiO2 and Si3N4 layers are employed, and the back channel regions are passivated to prevent depletion region formation. We have compared the electrical performance of TFTs with n+ a-Si source and drain contacts and n+ μc-Si source and drain contacts, relating some differences in performance to the properties of the source and drain materials. In addition we discuss the fabrication and performance of TFT structures that include B-compensated i-μc-Si channel regions and heavily-doped n+ μc-Si source and drain contacts.

In a high resolution TFT LCD, the ratio of a parasitic capacitance between a gate and a source electrode to the liquid crystal capacitance increase. Increase of the Cgs/Clc makes the voltage shift of the pixel electrode large. This also results in degradation of the display quality such as image sticking or flicker. The voltage shift can be decreased by increasing the value of a storage capacitor, however, it decreases the aperture ratio.

We present a new thin film transistor structure to increase the storage capacitance without reducing the aperture ratio. In the simulation results, we have observed that the pixel voltage shift is remarkably reduced compared with the conventional one.

We report new measurements of the diffusion length of minority photocarriers in thin film amorphous silicon field effect transistor structures. We are able to vary the majority carrier photoconductance by more than four orders of magnitude while monitoring the effective ambipolar diffusion length using the photocarrier grating technique.

Inverted-staggered a-Si:H TFT was prepared by successive PECVD of a- SiN1.7:H and a- Si:H layers. Drain current ID vs gate voltage VG characteristics of the TFT were investigated. The gate-voltage swing defined by S=dVG/d(log ID) in the subthreshold region was 1.4 V at room temperature. If the observed S value is attributed to the bulk gap state density, the space- charge layer width is estimated to be about 450 A. This value is too small compared with the a-Si:H layer width of about 3000 A in the TFT, which exhibits good performance. On the other hand, if the S value is attributed to the interface states, a state density of 1.5×l012 (cm2 eV)-1 is necessary. Nearly the same density, (l-2)xl012 (cm2 eV)-1, nearly independent of the energy level, was obtained in oura-SiN1.7:H/c-Si interface by capacitance measurements. Therefore, it is concluded that the interface states are the main origin of the subthreshold characteristics in our a-Si:H TFT.

We have measured the device characterisics of short and long channel inverted- staggered hydrogenated amorphous silicon thin film transistors (TFTs) with either Mo or Cr source/drain metal after annealing at temperatures from 225 C to 275 C. The TFT deposition temperature at the substrate surface was about 270 C. From the slope of the transfer characteristic an effective mobility is extracted. Devices with Mo source/drain metal exhibit an initial effective mobility increase at short times (within about 30 min), while those with Cr do not. At long times the mobility of all devices decreases. The mobility changes are greatest for short channel length devices because of contact effects. The channel length dependence of the behavior permits a separation of the device behavior into contact and intrinsic mobility components.

The hydrogenation effect was studied in the fabrication of amorphous silicon thin film transistor using APCVD technique. The inverse staggered type a-Si TFTs were fabricated with the deposited a-Si and SiO2 films by the atmospheric pressure (AP) CVD. The field effect mobility of the fabricated a-Si TFT is 0.79 cm2/Vs and threshold voltage is 5.4V after post hydrogenation. These results can be applied to make low cost a-Si TFT array using an in-line APCVD system.

Thin-film, n-channel transistors were fabricated in hydrogenated amorphous silicon and silicon- germanium thin films using ion implantation to form source and drain regions. The germanium alloy content in the films were: 0, 15, and 25 at % For each content of germanium, the annealing temperature and time necessary to activate the implant, without degrading device performance due to hydrogen effusion, was determined. The time necessary to anneal aluminum to form ohmic contacts at the optimal anneal temperature (260°C) was also determined. Thin-film transistors were characterized, and important device parameters such as: saturation mobility, threshold voltage, subthreshold swing, and ON-OFF current ratio were determined.

We present results regarding to extraction of altered localized-states in both amorphous silicon and polycrystalline silicon thin film transistors under various conditions, such as electrical and light stress, crystallization, and hydrogenation. Both deep and tail states have been extracted by fitting calculated current-voltage curves to measured data. The density of deep states as well as tail states in a-Si are significantly increased by stress, which may be the predominant mechanism causing the degradation in a-Si TFT performances. Also, the correlations between trap distributions in poly-Si films and their device performances have been successfully identified by analyzing the effects of crystallization and hydrogenation on the current-voltage characteristics of poly-Si TFT’s.