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Minimization of Interfacial Microroughness for 13–60 Å Ultrathin Gate Oxides

Published online by Cambridge University Press:  10 February 2011

J. Sapjeta ,
T. Boone ,
J. M. Rosamilia ,
P. J. Silverman ,
T. W. Sorsch ,
G. Timp  and
B. E. Weir
J. Sapjeta
Affiliation:
Bell Laboratories Lucent Technologies Murray Hill, NJ 07974
T. Boone
Affiliation:
Bell Laboratories Lucent Technologies Murray Hill, NJ 07974
J. M. Rosamilia
Affiliation:
Bell Laboratories Lucent Technologies Murray Hill, NJ 07974
P. J. Silverman
Affiliation:
Bell Laboratories Lucent Technologies Murray Hill, NJ 07974
T. W. Sorsch
Affiliation:
Bell Laboratories Lucent Technologies Murray Hill, NJ 07974
G. Timp
Affiliation:
Bell Laboratories Lucent Technologies Murray Hill, NJ 07974
B. E. Weir
Affiliation:
Bell Laboratories Lucent Technologies Murray Hill, NJ 07974
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Abstract

By using a combination of smooth epi substrates (0.7 Å rms roughness), in-situ UV/Cl2 processing, and rapid thermal oxidation, highly reliable ultrathin gate oxides were produced with ≤ 1.0 Å rms interface roughness.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 477 , 1997 , 203
Copyright
Copyright © Materials Research Society 1997

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References

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