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Latchup Free Lateral Cmos on Laser Recrystallized Silicon

Published online by Cambridge University Press:  28 February 2011

S. Sritharan ,
R. Solanki ,
G. J. Collins ,
J. Fukumoto ,
N. Szluk  and
D. Ellsworth
S. Sritharan
Affiliation:
Colorado State University, Fort Collins, Colorado.
R. Solanki
Affiliation:
Colorado State University, Fort Collins, Colorado.
G. J. Collins
Affiliation:
Colorado State University, Fort Collins, Colorado.
J. Fukumoto
Affiliation:
NCR Microelectronics, Fort Collins, Colorado.
N. Szluk
Affiliation:
Colorado State University, Fort Collins, Colorado.
D. Ellsworth
Affiliation:
NCR Microelectronics, Fort Collins, Colorado.
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Abstract

Latchup free CMOS devices have been fabricated by forming PMOS transistors in a 0.5μm thick laser recrystallized silicon layer. This recrystallized layer is isolated fram the bulk wafer by a lμm thick oxide layer. The NMOS transistors were fabricated both in the bulk wafer in the region which was used as the recrystallization seeds, as well as in the recrystallized silicon layer itself. Ring oscillators fabricated with 3μm channel length using a bi-layer lateral CMOS structure show a naninal delay of 1.7ns/stage. The MOS devices fabricated in the recrystallized silicon show low subthreshold leakage current, and surface electron and hole mobilities of 580cm2/V.s and 210cm2/V.s respectively.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 53 , 1985 , 407
Copyright
Copyright © Materials Research Society 1986

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References

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