This chapter describes the process of optoelectronic parameter extraction starting from the geometric parameters in components, followed by their use in circuit simulations. The techniques described can be used for components such as waveguides, couplers, Y-junctions, grating couplers, edge couplers, waveguide couplers, ring resonators, modulators, and filters and photo detectors, as described in Parts II and III. For fixed-cell designs, the components can be simulated once using the appropriate physical solvers and the optoelectronic parameters can be extracted for later use. For parameterized-cell designs, it is necessary to perform parameter sweeps over a range of possible geometries to create lookup tables or validated phenomenological models. We then show examples of how these extracted optoelectronic parameters can be used in photonic circuit simulations.

Need for photonic circuit modelling

Silicon photonics is a technology enabling large-scale integration of photonic components into photonic circuits. There is increasing interest in photonic integrated circuits in silicon systems for a variety of applications including on-chip and inter-chip communication systems. Broad adoption of silicon photonics technology for circuits and systems requires standardization in the design flow that is similar to what is available for electrical circuit design. This chapter describes methods for modelling optical circuits. The methods presented here are integrated as part of a design methodology that takes advantage of commercial electronic-design automation (EDA) tools for circuit design and layout, as described in Chapter 10.

Numerical methods such as finite-difference time domain (FDTD) and eigen-mode solvers coupled with solutions to optoelectronic equations are workhorses in silicon photonic component-level design. These methods unfortunately do not scale well as the number of components in the photonic circuit increases. Thus, modelling approaches that are computationally efficient yet accurately represent complex nanophotonic devices need to be employed in circuit simulations. In addition, the physical layout can affect the circuit response and needs to be considered. These issues have been addressed by the CMOS electronics industry, and are beginning to be incorporated into silicon photonic design.