3 - Hardware Verification using Higher Order Logic
Published online by Cambridge University Press: 21 January 2010
Summary
This chapter describes the basic techniques for using higher order logic to specify hardware behaviour and to prove the correctness of hardware designs.
The advantages of higher order logic as a formalism for hardware verification are discussed by Gordon in [45] and by Hanna and Daeche in [57, 58]. Higher order logic makes available the results of general mathematics, and this allows one to construct any mathematical tools needed for the verification task in hand. Its expressive power permits hardware behaviour to be described directly in logic; a specialized hardware description language is not needed. In the formulation used here, new constants and types can be introduced by purely definitional means. This allows special-purpose notation for hardware verification to be introduced without the danger associated with postulating ad hoc axioms. In addition, the inference rules of the logic provide a secure basis for proofs of correctness; a specialized deductive calculus for reasoning about hardware behaviour is not required.
Although higher order logic has all these pragmatic advantages, to say that it is the only feasible formalism for hardware verification would be an exaggeration. Some other approaches axe briefly discussed at the end of this chapter. Furthermore, higher order logic does not make traditional hardware description languages (HDLs) obsolete. A major problem with these languages is that they usually lack a formal semantics, which precludes using them to reason about hardware behaviour.
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- Higher Order Logic and Hardware Verification , pp. 29 - 46Publisher: Cambridge University PressPrint publication year: 1993