Aims

The aim of this chapter is to introduce the use of logic for stating the properties of data and functions in system models. The logic used in VDM-SL models is introduced via a temperature monitor example. On reaching the end of the chapter, the reader should be able to state and analyse logical expressions in VDMTools Lite.

Introduction

An important advantage of building a model of a computing system is that it allows for analysis, uncovering misunderstandings and inconsistencies at an early stage in the development process. The discovery of a possible failure of the Expert To Page function in the previous chapter was the result of just such an analysis. The ability to reason about the types and functions in a model depends on having a logic (a language of logical expressions) in which to describe the properties of the system being modelled and in which to conduct arguments about whether those properties hold or not.

This chapter introduces the language of logical expressions used in VDMSL, based on Predicate Logic. It begins by introducing the idea of a predicate, then examines the basic operators which allow logical expressions to be built up from simpler expressions. Finally, we examine the mechanisms for dealing with mis-application of operators and functions in the logic of VDM-SL.

The temperature monitor

The example running through this chapter continues the chemical plant theme. Suppose we are asked to develop the software for a temperature monitor for a reactor vessel in the plant. The monitor is connected to a temperature sensor inside the vessel from which it receives a reading (in degrees Celsius) every minute.