Skip to main content Accessibility help
×
Hostname: page-component-77c89778f8-m42fx Total loading time: 0 Render date: 2024-07-23T21:26:10.988Z Has data issue: false hasContentIssue false

Appendix E - 8255 Programmable Peripheral Interface data sheets

Published online by Cambridge University Press:  03 February 2010

Get access

Summary

Although cryptic, data sheets contain all of the detailed information about a particular device. But, be warned!, they are sometimes inaccurate due to typos and poor editing. The data sheets on the following pages of the 8255 PPI seem to be accurate.

  1. ▪ I MCS-85TM Compatible 8255A-5

  2. ▪ 24 Programmable I/O Pins

  3. ▪ Completely TTL Compatible

  4. ▪ Fully Compatible with Intel Microprocessor Families

  5. ▪ Improved Timing Characteristics

  6. ▪ Direct Bit Set/Reset Capability Easing Control Application Interface

  7. ▪ Reduces System Package Count

  8. ▪ Improved DC Driving Capability

  9. ▪ Available in EXPRESS

  10. — Standard Temperature Range

  11. — Extended Temperature Range

  12. ▪ 40 Pin DIP Package or 44 Lead PLCC (See Intel Packaging: Order Number: 231369)

The Intel 8255A is a general purpose programmable I/O device designed for use with Intel microprocessors. It has 24 I/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. In the first mode (MODE 0), each group of 12 I/O pins may be programmed in sets of 4 to be input or output. In MODE 1, the second mode, each group may be programmed to have 8 lines of input or output. Of the remaining 4 pins, 3 are used for handshaking and interrupt control signals. The third mode of operation (MODE 2) is a bidirectional bus mode which uses 8 lines for a bidirectional bus, and 5 lines, borrowing one from the other group, for handshaking.

General

The 8255A is a programmable peripheral interface (PPI) device designed for use in Intel microcomputer systems. Its function is that of a general purpose I/O component to interface peripheral equipment to the microcomputer system bus.

Type
Chapter
Information
Publisher: Cambridge University Press
Print publication year: 1990

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Save book to Kindle

To save this book to your Kindle, first ensure coreplatform@cambridge.org is added to your Approved Personal Document E-mail List under your Personal Document Settings on the Manage Your Content and Devices page of your Amazon account. Then enter the ‘name’ part of your Kindle email address below. Find out more about saving to your Kindle.

Note you can select to save to either the @free.kindle.com or @kindle.com variations. ‘@free.kindle.com’ emails are free but can only be saved to your device when it is connected to wi-fi. ‘@kindle.com’ emails can be delivered even when you are not connected to wi-fi, but note that service fees apply.

Find out more about the Kindle Personal Document Service.

Available formats
×

Save book to Dropbox

To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Dropbox.

Available formats
×

Save book to Google Drive

To save content items to your account, please confirm that you agree to abide by our usage policies. If this is the first time you use this feature, you will be asked to authorise Cambridge Core to connect with your account. Find out more about saving content to Google Drive.

Available formats
×