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Quantum Simulation of C-V and I-V Characteristics in Ge and III-V Materials/High-κ MOS Devices

Published online by Cambridge University Press:  31 January 2011

Mathieu Moreau
Affiliation:
mathieu.moreau@im2np.fr, IM2NP-CNRS, Marseille, France
Daniela Munteanu
Affiliation:
daniela.munteanu@univ-provence.fr, IM2NP-CNRS, Marseille, France
Jean-Luc Autran
Affiliation:
jean-luc.autran@univ-provence.fr, IM2NP-CNRS, Marseille, France
Florence Bellenger
Affiliation:
bellenge@imec.be, IMEC and KU Leuven, Leuven, Belgium
Jérome Mitard
Affiliation:
mitard@imec.be, IMEC, Leuven, Belgium
Michel Houssa
Affiliation:
michel.houssa@fys.kuleuven.be, IMEC and KU Leuven, Leuven, Belgium
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Abstract

We present a one-dimensional simulation study of the capacitance-voltage (C-V) and current-voltage (I-V) characteristics in MOS devices with high mobility semiconductors (Ge and III-V materials) and non-conventional gate stack with high-κ dielectrics. The C-V quantum simulation code self-consistently solves the Schrödinger and Poisson equations and the electron transport through the gate stack is computed using the non-equilibrium Green’s function formalism (NEGF). Simulated C-V characteristics are successfully confronted to experimental data for various MOS structures with different semiconductors and dielectric stacks. Simulation of I-V characteristics reveals that gate leakage current strongly depends on gate stacks and substrate materials and predicts low leakage current for future CMOS devices with high mobility materials and high-κ dielectrics.

Type
Research Article
Copyright
Copyright © Materials Research Society 2010

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