Introduction

This chapter presents a survey of selected theoretical foundations of large-signal device modeling for nonlinear circuit simulation. Topics covered include conditions for well-defined nonlinear constitutive relations, nonlinear charge modeling including a comprehensive discussion of terminal charge conservation, and also diffusion charge, transit time, and capacitance cancelation modeling in III–V HBTs. Practical considerations are presented for regularizing poorly defined constitutive relations, constructing and using nonlinear table-based models, and extrapolating measurement-based models for robust convergence. Recent advances in nonlinear measurement instrumentation, specifically the commercial availability of the nonlinear vector network analyzer (NVNA), and the growing sophistication of artificial neural networks for device modeling, are simultaneously exploited to develop an advanced electrothermal and trap-dependent III–V FET model constructed directly from large-signal data.

The equivalent circuit

Intrinsic and extrinsic elements

The separation of a circuit-level transistor model into intrinsic and extrinsic parts is an idealization that simplifies the treatment of an otherwise very complicated device. Equivalent circuits of a simple quasi-static III–V FET model [1] and a modern III–V HBT model [2–4] are shown in Figure 5.1 and Figure 5.2, respectively.

Conceptually, the intrinsic model describes the dominant nonlinearities of the transistor that occur in the active region, inside the feed networks, manifolds, and other parasitic particularities of the layout. For FETs, the intrinsic model includes that part of the active drain-source channel controlled by the gate and modulated by gate–source and drain–source voltages.