Book contents
- Frontmatter
- Contents
- Contributors
- Preface
- Section I CMOS circuits and technology limits
- 1 Energy efficiency limits of digital circuits based on CMOS transistors
- 2 Beyond transistor scaling: alternative device structures for the terascale regime
- 3 Benchmarking alternative device structures for the terascale regime
- 4 Extending CMOS with negative capacitance
- Section II Tunneling devices
- Section III Alternative field effect devices
- Section IV Spin-based devices
- Section V Interconnect considerations
- Index
- References
4 - Extending CMOS with negative capacitance
from Section I - CMOS circuits and technology limits
Published online by Cambridge University Press: 05 February 2015
Book contents
- Frontmatter
- Contents
- Contributors
- Preface
- Section I CMOS circuits and technology limits
- 1 Energy efficiency limits of digital circuits based on CMOS transistors
- 2 Beyond transistor scaling: alternative device structures for the terascale regime
- 3 Benchmarking alternative device structures for the terascale regime
- 4 Extending CMOS with negative capacitance
- Section II Tunneling devices
- Section III Alternative field effect devices
- Section IV Spin-based devices
- Section V Interconnect considerations
- Index
- References
Summary
Introduction
It is now well recognized that energy dissipation in microchips may ultimately restrict device scaling – the downsizing of physical dimensions that has fueled the fantastic growth of the microchip industry so far [1–6]. But there is a fundamental limit to the dissipation that can be achieved in the transistors that are at the heart of almost all electronic devices. Conventional transistors are thermally activated. A barrier is created that blocks the current and then the barrier height is modulated to control the current flow. This modulation of the barrier changes the number of electrons following the exponential Boltzmann factor, exp(qV / kT). This, in turn, means that a voltage of at least 2.3kT / q (which translates to 60 mV at room temperature) is necessary to change the current by an order of magnitude. In practice, a voltage many times this limit of 60 mV has to be applied to obtain a good ratio of on- and off-currents. As a result, it is not possible to reduce the supply voltage in conventional transistors below a certain point, while still maintaining the healthy on/off ratio that is necessary for robust operation. On the other hand, continuous downscaling is putting an ever larger number of devices in the same area, thereby increasing the energy dissipation density beyond controllable and sustainable limits. This situation is often called Boltzmann’s Tyranny [2], and it has been predicted that unless new principles can be found based on fundamentally new physics, then transistors will die a thermal death [4].
- Type
- Chapter
- Information
- CMOS and BeyondLogic Switches for Terascale Integrated Circuits, pp. 56 - 76Publisher: Cambridge University PressPrint publication year: 2015
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