Active Si Interposers (ASI), which are device chips with through Si vias (TSVs) and redistribution wirings, are the focus of this study. A feature of the module is that the redistribution layer includes a stress buffer layer so that stress can be alleviated when it is mounted on a motherboard. For the purpose of this study, it was decided to conduct the process from the backside of the wafer for efficiency of production. One feature of this process is that a device wafer was processed with a glass wafer supported throughout the TSVs' process in order to facilitate process of a thin wafer. However, the maximum temperature of each process was limited. We addressed this problem by the optimization of some of the equipment and the modification of the adhesive that attaches the device wafer to a glass wafer. Finally, a module that was a combination with the ASI and a certain device operated normally. In the last part of this study, the results of the evaluation that studied the impact on the devices of the TSVs' process are presented.