This paper presents a novel GaN-based digital outphasing power amplifier (PA) for the 800 MHz range. The PA reaches a maximum output power of 5.8 W at 30 V final-stage (FS) drain supply voltage. A novel output combiner circuit is used and efficiency is improved by resonant commutation of the FSs and optimized driver circuits for the two GaN push-pull FSs. 3D electromagnetic simulation of output network has been conducted to extract an equivalent circuit model and to access full information in terms of functionality and broadband impedance characteristics for optimized outphasing operation in the final design. Measured total efficiencies (ηtot) of 59 and 25% at 0 and 10 dB power back-off are achieved, respectively, fitting the simulation quite well. The proposed digital outphasing module is a promising candidate for fully digitized base-station architectures in future wireless communications.

The paper presents a highly efficient GaN-based synchronous buck converter suitable for switching in the lower GHz range. The module includes a very compact 2-stage GaN half-bridge converter MMIC (monolithic microwave integrated circuit) for low parasitic inductances between switches and drivers and a hybrid output network with core-less inductors to avoid ferrite losses. At 1 GHz switching frequency the buck converter achieves with pulse-width modulated (PWM) input signals power loop conversion efficiencies up to 78% for 40 V operation and output voltages up to 33 V. For 100 MHz the power loop efficiencies peak at 87.5% for 14.5 W conversion to 25 V. By changing the output network to a 2nd order low-pass with 700 MHz cut-off frequency the module has been characterized for the use as a supply modulator in very broadband envelope tracking systems with modulation bandwidths of up to 500 MHz. For 1 GHz switching frequency the power-added efficiency peaks at 74% for a 90% duty-cycle PWM input signal. The novelty of this work is that for the first time a buck converter design proves highest flexibility supporting different applications from very compact DC converters to microwave power amplifier efficiency enhancement techniques as well as efficient high frequency switching up to 1 GHz.

This paper presents a fully digital transmitter chain from baseband to antenna, including a modulator, two truly digital (i.e. fully switched) microwave power amplifiers and a transmit/receive switch. Both, amplifier and switch monolithic microwave integrated circuits were implemented in a GaN HEMT process. The novel amplifier design provides greatly reduced complexity, needing only three voltage sources. Measurements were conducted using 5, 20, and 100 MHz wide baseband signals. Carrier frequencies cover the 900 and 2000 MHz bands. For the 5 MHz BB signal an ACLR of over 52 dB is reached, fulfilling the 3GPP specs for base station use while still maintaining a final-stage drain efficiency of 46% at 6.5 dB peak to average power ratio. Full-scale output power at 30 V supply voltage was measured to exceed 3 W at 80% drain efficiency. Further features of this digital amplifier approach include small form factor and frequency agility, making it an ideal candidate for software defined radio.

This paper presents for the first time a wavetable-based coding scheme to generate a high-speed binary input signal for digital RF power amplifiers. The approach maximizes the utilization of the time domain handling capabilities of the pulse forming circuit. Key features are a greatly improved output spectrum purity in comparison with common digital modulators, the ability to adjust the modulator to any given pulse forming hardware and a built-in signal correction option that comes without additional computational cost. To give a first impression on the modulators behavior and its possibilities to adapt to different hardware constraints, simulations are carried out for different parameter variations and for different baseband bandwidths. Furthermore, the proposed concept is emulated with an arbitrary waveform generator to gather additional measurement data. For a 5 MHz wideband code division multiple access (WCDMA) signal (6.5 dB peak-to-average power ratio) at 900 MHz, an error vector magnitude (EVM) of 0.26% and better than >58 dB adjacent channel leakage ratio (ACLR) were recorded. To the authors’ knowledge, these are the best values achieved so far for a single-bit coding scheme without digital predistortion that still maintains maximum power coding efficiency.

This paper presents for the first time high-efficiency W-band power amplifiers (PAs), the design of which follows the digital PA (DPA) design concept. Two DPAs with different output networks have been realized: a single-band version (S-DPA) for 95 GHz and a dual-band design (D-DPA) for signal frequencies fS of 68 GHz (first band) and 76 GHz (second band), respectively. The PAs are realized as monolithic microwave-integrated circuits (MMICs) in a 0.8 μm InP DHBT transferred-substrate process. They utilize a double-emitter-finger DHBT unit cell with an emitter area of 2 × 0.8 × 6 μm3 each. In contrast to the usual W-band PAs, the proposed single-stage amplifier MMICs do not apply any special reactive matching for the transistor, which leads to very compact chip sizes of 0.27 mm2 (S-DPA) and 0.39 mm2(D-DPA). The S-DPA includes one band-pass filter (BPF) at the output with 0.6 dB insertion loss (IL) and 24 dB input return loss (RL) at the signal frequency of 95 GHz. The dual-band BPF shows 0.7 dB IL in both bands with a RL of more than 21 dB each. Applying an overdriven sinusoidal input signal to emulate digital operation the DPAs achieve a maximum output power of 14.4 dBm and power-added efficiency of 31% when using the single-band configuration. Collector efficiencies of more than 80% and the flexible multi-band operation demonstrated prove the great potential of the digital PA concept for future high-speed communications.

In this paper, two compact lumped-element band pass reconstruction filters for digital microwave power amplifiers applications in the 800 MHz band are presented. The filters, based on the trisection and quartet topologies, include cross-couplings which produce transmission zeros for maximum selectivity, and can be designed with practical element values. In contrast to common filter designs the input impedance characteristic is optimized broadband to values different from 50 Ω, as required for proper amplifier operation. Both filters achieve an insertion loss of around 0.8 dB and an equiripple bandwidth of 240 MHz (trisection) and 290 MHz (quartet), respectively, with improved out-of-band suppression. Results show that a considerable improvement in amplifier linearity and efficiency can be obtained with the new proposed filters, as compared with simpler filters traditionally used in power amplifier applications.

This paper reports on digital transmitter architecture for the 450 MHz band using an envelope delta-sigma modulator realized in CMOS and a voltage-mode class-S (VMCS) power amplifier (PA) based on GaN monolithic microwave integrated circuits (MMICs). The class-S PA is characterized for narrowband single-tone signals and a single- as well as a four-carrier downlink wideband code division multiple access (WCDMA) signal with a peak-to-average power ratio of 7.5 dB. Using single-tone excitation the PA shows a maximum drain efficiency of 86% and a peak output power of 4.4 W. At 6 and 10 dB back-off, 59 and 36% efficiency are achieved, respectively. With the single- and four-carrier WCDMA input signals maximum drain efficiencies of 64 and 53% are reached, respectively, and peak output power is 0.7 W. The adjacent channel leakage ratio shows values of about −34 dBc (5 MHz) and −38 dBc (10 MHz) for single-carrier WCDMA excitation. This is the first complete VMCS PA chain characterized with standard communication signals.

This paper reports on a novel voltage-mode class-S power amplifier for the 450 MHz band, based on GaN–HEMT monolithic microwave integrated circuits (MMICs). It achieves a peak output power of 3.4 W for a single tone at 400 MHz, encoded in standard band-pass delta-sigma modulation with 1.6 Gbps sampling frequency. The corresponding efficiency is 38%, peaking at 52% for 0.5 W output power. In order to demonstrate the influence of coding efficiency, additional measurements using a periodic square-wave signal were performed (class-D operation), which yield a maximum output power of 7 W with 64% efficiency. To the author's knowledge, these are the best results in this frequency range achieved so far with the voltage-mode class-S configuration. The paper discusses behavior at power back-off and the influence of the loss mechanisms.