Hostname: page-component-77c89778f8-vpsfw Total loading time: 0 Render date: 2024-07-20T18:06:53.052Z Has data issue: false hasContentIssue false

A logic programming approach to predict effective compiler settings for embedded software

Published online by Cambridge University Press:  03 September 2015

CRAIG BLACKMORE
Affiliation:
Department of Computer Science, University of Bristol, Merchant Venturers Building, Woodland Road, Bristol, BS8 1UB, United Kingdom (e-mail: craig.blackmore@bristol.ac.uk, oliver.ray@bristol.ac.uk, kerstin.eder@bristol.ac.uk)
OLIVER RAY
Affiliation:
Department of Computer Science, University of Bristol, Merchant Venturers Building, Woodland Road, Bristol, BS8 1UB, United Kingdom (e-mail: craig.blackmore@bristol.ac.uk, oliver.ray@bristol.ac.uk, kerstin.eder@bristol.ac.uk)
KERSTIN EDER
Affiliation:
Department of Computer Science, University of Bristol, Merchant Venturers Building, Woodland Road, Bristol, BS8 1UB, United Kingdom (e-mail: craig.blackmore@bristol.ac.uk, oliver.ray@bristol.ac.uk, kerstin.eder@bristol.ac.uk)

Abstract

This paper introduces a new logic-based method for optimising the selection of compiler flags on embedded architectures. In particular, we use Inductive Logic Programming (ILP) to learn logical rules that relate effective compiler flags to specific program features. Unlike earlier work, we aim to infer human-readable rules and we seek to develop a relational first-order approach which automatically discovers relevant features rather than relying on a vector of predetermined attributes. To this end we generated a data set by measuring execution times of 60 benchmarks on an embedded system development board and we developed an ILP prototype which outperforms the current state-of-the-art learning approach in 34 of the 60 benchmarks. Finally, we combined the strengths of the current state of the art and our ILP method in a hybrid approach which reduced execution times by an average of 8% and up to 50% in some cases.

Type
Regular Papers
Copyright
Copyright © Cambridge University Press 2015 

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

ARM. 2006. Cortex-M3 technical reference manual (Revision: r1p1).Google Scholar
BEEBS 2015. http://beebs.eu/. [Accessed 02/07/2015].Google Scholar
Collective Benchmark 2012. http://ctuning.org/cbench/ [Accessed 05/03/15].Google Scholar
Fursin, G., Kashnikov, Y., Memon, A. W., Chamski, Z., Temam, O., Namolaru, M., et al. 2011. Milepost GCC: Machine learning enabled self-tuning compiler. International Journal of Parallel Programming 39, 3, 296327.CrossRefGoogle Scholar
Fursin, G., Miranda, C., Temam, O., Namolaru, M., Yom-Tov, E., Zaks, A., et al. 2008. Milepost GCC: machine learning based research compiler. In GCC Summit.Google Scholar
GCC, the GNU Compiler Collection 2015. http://gcc.gnu.org/. [Accessed 02/04/2015].Google Scholar
Kulkarni, S. and Cavazos, J. 2012. Mitigating the compiler optimization phase-ordering problem using machine learning. ACM SIGPLAN Notices 47, 10 (Oct.), 147162.Google Scholar
LLVM 2015. http://llvm.org/. [Accessed 02/07/2015].Google Scholar
Muggleton, S. 1995. Inverse entailment and progol. New Generation Computing 13, 3–4, 245286.Google Scholar
Muggleton, S. and De Raedt, L. 1994. Inductive logic programming: Theory and methods. The Journal of Logic Programming 19, 629679.CrossRefGoogle Scholar
Pallister, J., Hollis, S. J. and Bennett, J. 2013a. BEEBS: Open benchmarks for energy measurements on embedded platforms. arXiv:1308.5174v2 [cs.PF].Google Scholar
Pallister, J., Hollis, S. J. and Bennett, J. 2013b. Identifying compiler options to minimize energy consumption for embedded platforms. The Computer Journal.Google Scholar