Hostname: page-component-5c6d5d7d68-wbk2r Total loading time: 0 Render date: 2024-08-17T15:38:25.888Z Has data issue: false hasContentIssue false
  • English
  • Français

Delay model for dynamically switching coupled RLC interconnects

Published online by Cambridge University Press:  24 April 2014

Devendra Kumar Sharma ,
Brajesh Kumar Kaushik  and
Rajender Kumar Sharma
Devendra Kumar Sharma
Affiliation:
Department of Electronics and Communication Engineering, Meerut Institute of Engineering and Technology, Meerut 250005, India
Brajesh Kumar Kaushik*
Affiliation:
Department of Electronics and Communication Engineering, Indian Institute of Technology, Roorkee 247667, India
Rajender Kumar Sharma
Affiliation:
Department of Electronics and Communication Engineering, National Institute of Technology, Kurukshetra 136119, Haryana, India
*
ae-mail: brajesh_k_k@yahoo.com
Get access

Abstract

With the evolution of integrated circuit technology, the interconnect parasitics can be the limiting factor in high speed signal transmission. With increasing frequency of operation, length of interconnect and fast transition time of the signal, the RC models are not sufficient to estimate the delay accurately. To mitigate this problem, accurate delay models for coupled interconnects are very much required. This paper proposes an analytical model for estimating propagation delay in lossy coupled RLC interconnect lines for simultaneously switching scenario. To verify the proposed model, the analytical results are compared with those of FDTD and SPICE results for the two cases of inputs switching under consideration. An average error of 2.07% is observed which shows an excellent agreement with SPICE simulation and FDTD computations.

Type
Research Article
Information
The European Physical Journal - Applied Physics , Volume 66 , Issue 1 , April 2014 , 10903
Copyright
© EDP Sciences, 2014

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

Rabaey, J.M., Digital Integrated Circuits, a Design Perspective (Prentice-Hall, Englewood Cliffs, NJ, 1996)Google Scholar
Kaushik, B.K., Sarkar, S., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 27, 1150 (2008)CrossRef
Semiconductor Industry Association: International Technology Roadmap for Semiconductors (2009), http://public.itrs.netPubMed
Liu, F., Kashyap, C., Alpert, C.J., in Proc. IEEE/ACM International Conference on Computer-Aided Design (ACM, New York, NY/San Jose, California, USA, 2002), pp. 620–624Google Scholar
Sakurai, T., IEEE Trans. Electron Devices 40, 118 (1993)CrossRef
Sakurai, T., IEEE J. Solid-State Circuits 18, 418 (1983)CrossRef
Kawaguchi, H., Sakurai, T., in Asia and South Pacific Design Automation Conference, 1998 (IEEE Computer Society, Yokohama, Japan) pp. 35–43Google Scholar
Kahng, A.B., Muddu, S., Sarto, E., in IEEE Design Automation Conference (IEEE Computer Society, Los Angeles, CA, USA, 2000), pp. 79–84Google Scholar
Coulibaly, L.M., Kadim, H.J., International Symp. on Signals, Circuits and Systems (IEEE CAS Society, Iasi Romania, 2005) pp. 717–720Google Scholar
Ismail, Y.I., Friedman, E.G., Neves, J.L., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 19, 83 (2000)CrossRef
Chen, G., Friedman, E.G., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 24, 170 (2005)CrossRef
Davis, J.A., Meindl, J.D., IEEE Trans. Electron Devices 47, 2068 (2000)CrossRef
Davis, J.A., Meindl, J.D., IEEE Trans. Electron Devices 47, 2078 (2000)CrossRef
Kahng, A.B., Muddu, S., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 16, 1507 (1997)CrossRef
Roy, S., Dounavis, A., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 28, 1481 (2009)CrossRef
Pillage, L.T., Rohrer, R.A., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 9, 352 (1990)CrossRef
Odabasioglu, A., Celik, M., Pileggi, L.T., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 17, 645 (1998)CrossRef
Venkatesan, R., Davis, J.A., Meindl, J.D., IEEE Trans. Electron Devices 50, 1081 (2003)CrossRef
Venkatesan, R., Davis, J.A., Meindl, J.D., IEEE Trans. Electron Devices 50, 1094 (2003)CrossRef
Agarwal, K., Sylvester, D., Blaauw, D., IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 25, 892 (2006)CrossRef
Naeemi, A., Davis, J.A., Meindl, J.D., IEEE Trans. Electron Devices 51, 1902 (2004)CrossRef
Chen, J., He, L., in Proc. ACM Great Lakes Symp. VLSI (ACM SIGDA, New York, NY, USA, 2002), pp. 41–46 Google Scholar
Paul, C.R., Analysis of Multiconductor Transmission Lines (Wily Interscience, NY, 1994)Google Scholar
Paul, C.R., IEEE Trans. Electromagn. Compat. 36, 85 (1994)CrossRef
Kaushik, B.K., Sarkar, S., Agarwal, R.P., Joshi, R.C., Microelectron. Int. 23, 55 (2006)CrossRef