Rapid thermal processing (RTP) has become a key technology in the fabrication of advanced semiconductor devices. As RTP becomes the accepted technique for an increasingly wide range of processes in device fabrication, the understanding of the basic physics of radiation heat transfer in RTP systems is also being extended rapidly. This paper illustrates the use of optical models for prediction of the thermal radiative properties of semiconductor wafers. Such calculations can be used to address many of the key issues of interest in RTP, including questions concerning temperature measurement and process repeatability.

Under a joint development contract with Applied Materials (AMAT) and Texas Instruments (TI), SEMATECH undertook a project (Joint Development Project J100) with a goal of delivering a cost effective, technically advanced Rapid Thermal Processor (RTP). The RTP tool was specified to meet the present and future manufacturing needs of SEMATECH's member companies. The J100 results contained here will focus on the temperature and control performance of the AMAT RTP tool. The evaluation methodology included passive data collection (PDC) to check the tool stability, screening experiments to isolate the variable interaction and to define the process window, broad range and narrow range sensitivity studies to determine the sheet resistance dependence on thermal budget for small increments in temperature set point, perturbation experiments to determine localized control, and stability experiments to check for drift and process repeatability. The impact of wafer emissivity on source/drain rapidthermal annealing was evaluated by processing wafers with varying backside films. The PDC experiments demonstrated the tool to be stable. Screening experiments revealed the strong effect of temperature, followed by time, and time-temperature interaction on sheet resistance. Boron implanted (p+/n) wafers were found to be sensitive at a temperature of 1025 °C or less for a 10 second anneal whereas arsenic implanted wafers (n+/p) showed greater sensitivity at temperatures ranging from 1025 °C to 1100 °C for a 10 second anneal.

Under a joint development contract with Applied Materials (AMAT) and Texas Instruments (TI), SEMATECH undertook a project (Joint Development Project J100) with a goal of delivering a cost effective, technically advanced Rapid Thermal Processor (RTP). The RTP tool was specified to meet the present and future manufacturing needs of SEMATECH's member companies. The J100 results contained here will focus on the temperature and control performance of the AMAT RTP tool. The J100 results on the temperature measurement and control performance of AMAT's RTP tool using bare backside monitor wafers were presented in part I. In actual manufacturing environments the backside conditions of wafers are not consistent which causes temperature variations during rapid thermal processing. In this experiment, boron monitor wafers with varying backside conditions were used to test the uniformity, repeatability, and stability of the tool. The wafer backside films were fabricated using predictions from emissivity models and were subsequently verified by experimental techniques. In addition, perturbation experiments utilizing boron and arsenic implanted wafers demonstrated a high degree of localized temperature control across the wafers. A 3-sigma temperature variation ranging from 3.0 °C (for wafers with similar backside films) to 6.0 °C (for wafers with varying backside films) was found for all wafers processed during this evaluation. The perturbation experiments, which included a forced temperature offset of two degrees at one of the wafer temperature sensors, resulted in a noticeable change in sheet resistance across the wafer.

Many RTP reactors used in production presently employ single point temperature measurement along with multiple lamp zone control. Optimum zone settings in these systems are known to vary depending on the radiative properties of the wafer and the process. Therefore, tuning the system to meet specifications for a new process is achieved by an operator analyzing metrology results and drawing on experience with the system to determine proper zone settings. It would be desirable to have a technique which can be used to optimize the lamp zone settings in an automatic manner that would be the same for every user. Furthermore, such a technique should be both simple to use and robust. In this work a method is presented which relies on an empirical response surface and an interative computational technique to minimize process variance. The results show that the method works regardless of the process variable being optimized, i.e. temperature, oxide thickness, etc., and that the method relies on no user input.

A Monte Carlo model is developed to simulate transient wafer heating as a function of system parameters in a kaleidoscope- or integrating light-pipe type cavity with square cross-section. Trends in wafer temperature uniformity are examined as a function of length-to-width ratio, cavity width, and the number of heating lamps. The effect on temperature determination by a radiometer placed in the bottom end wall of the cavity is simulated.

Multilayer patterns can lead to temperature non-uniformity and undesirable levels of thermal stress in silicon wafers during rapid thermal processing (RTP). Thermal stress can, in turn, cause problems such as photolithography overlay errors and degraded device performance through plastic deformation. In this work, the temperature and stress fields in patterned wafers are simulated using detailed finite-element based reactor transport models coupled with electromagnetic theory for predicting radiative properties of multilayers. The temperature distributions are then used to predict the stress fields in the wafer and the onset of plastic deformation. Results are presented for two generic two-dimensional axi-symmetric reactors employing single and double side illumination. The effect of patterns and processing parameters are explored, and strategies for avoiding pattern induced plastic deformation are evaluated.

Decreasing feature sizes in the microelectronics industry have led to numerous processing problems with thin film semiconductors. Non-uniform temperature distributions, due to microscale radiation effects on the radiative properties of the thin film structures, are responsible for wafer defects. These microscale radiation effects become significant as pattern spacing and film thicknesses reach the same order of magnitude as the wavelengths of the heat-source radiation. A numerical model has been developed in which normal emissivities for patterned wafers are calculated, using an effective index of refraction technique. In this study various patterns at temperatures critical to the thermal processing are examined.

This paper presents a systematic way of developing low order nonlinear models from physically- based, large scale finite element models of rapid thermal processing (RTP) systems. The low order model is extracted from transient results of the finite element model using the proper orthogonal decomposition (POD) method. Eigenfunctions obtained from the POD method are used as basis functions in spectral Galerkin expansions of partial differential equations solved by the finite element model to generate the reduced models. Simulation results demonstrate good agreement with steady state and transient data generated from the finite element model.

This paper presents the development of an experimental technique for the reception of holographic interferograms of H2 and Ar flows in a RTCVD reactor with a complex geometry. The obtained holographic patterns were analyzed for the reconstruction of the gas flow in the RTCVD reactor. The fringe patterns showing the gas density distributions were recalculated into temperature distributions. Experimental results were compared with the predicted flow field.

The pattern effects in hot processes arise from a spatial variation of the radiative heat flux imbalance between emission and absorption. There are two scenarios to reduce the pattern effect: a very reflective chamber facing the patterned side with an illumination from the backside or a controlled double sided illumination on the other hand. The paper demonstrates the mechanism of both scenarios with a simple mathematical model and discusses the limitations of the approaches. The results will be exemplified with the help of reactor scale simulations involving a detailed Monte Carlo radiation model featuring continuous spectral dependence.

The growth and advancement of the electronic and photonic industry in the 21 st century hinges on revolutionary new processing techniques that will overcome some of the most fundamental limitations of conventional methods. Rapid isothermal processing (RIP) based on incoherent radiation as the source of optical and thermal energy can play a major role in designing processing systems that offer the tight process control, low thermal budgets, low microscopic defects, high throughput and high yields required for almost every semiconductor device. Conventional RIP can be further optimized by fully exploiting the contribution of quantum photoeffects. The improved performance and reliability offered by RIP will make it the mainstream technology for the green manufacture of microelectronics, optoelectronics, solar cells, flat panel displays and microelectromechanical systems. Key issues related to the cost of ownership, design of RIP system based on the full utilization of photo–thermal effects and model based control systems are described. New experimental results for a number of processing steps are provided. These results demonstrate the importance of advanced RIP systems in providing better performance and lower defects for future devices.

We have developed a methodology aimed at accurately determining the various forms of energy transfer(convective loss, radiative loss and absorption of lamp energy by the wafer)occurring in any advanced RTP system, based on basic system identification experiments and simple 3- dimensional physical model depicting the heat transfer processes. The identification experiments help in estimating the uncertain system dependent factors which characterize the various forms of energy transfer, which may be otherwise difficult to calculate on pure theoretical basis. This methodology forms the basic building block of our effort to develop a tool which can predict the temperature distribution across the wafer in a realistic way. This tool can be used both as a wafer temperature control algorithm in any advanced RTP system by incorporating more accurate system impedance parameters(convective and radiative loss) as well as by an end user to calculate the required power level settings to various lamp zones to attain reasonable temperature uniformity for a RTP system which does not have a dynamic con-rol.

Rapid Thermal Processing (RTP) has sometimes been used to increase bipolar NPN Beta (Hfe, or current gain) for a polysilicon emitter BICMOS process. It has been demonstrated that Beta may be increased by 20%, compared to normal non-RTP process values, by the addition of an RTP cycle after the final high temperature furnace step. In our work it was found that emitter-base reverse bias degrades Beta much more severely for a process which uses RTP, than for a non-RTP process. In this paper we will report on the electrical performance effects of RTP on a variety of process parameters. The reliability effects on NPN Beta degradation lifetime, and NMOS reliability effects will be discussed as well.

Modified Ostwald ripening theory is used to calculate the time evolution of the size distribution function of extended end-of-range defects in ion implanted silicon. This allows to compare the time dependent self-interstitial supersaturation during postimplantation annealing in the presence of Frank-type stacking faults with that in the presence of {311} - defects. It is shown that the latter affect self-interstitial concentrations up to the point where they dissolve whereas the former are irrelevant from the point of view of transient enhanced diffusion.

Deep submicron CMOS technology for low-power, low-voltage applications requires the use of symmetric n+/p+ poly gate structures. This requirement introduces a number of processing challenges, involving fundamental issues of atomic diffusion over distances of 1Å to ∼30μm. Two of the critical issues are dopant cross-diffusion between P- and NMOS devices with connected gates, resulting in large threshold voltage shifts, and boron penetration through the gate oxide. We show that in devices with W-polycide dual-gat:e structure most of these problems can be alleviated by using rapid thermal annealing, RTA, in combination with a few additional, simple processing steps (e. g., low-temperature recrystallization of a-Si layer and selective nitrogen coimplants). The RTA step, in particular, ensures thai: the boron activation in the p+ poly-Si remains high and negates any effects of arsenic cross-diffusion. CMOS devices with properly processed gates have low gate stack profiles, small threshold voltage shifts (<30mV), and excellent device characteristics.

Lateral dopant diffusion is a well known problem in dual-gate W-polycide CMOS devices. We have recently demonstrated that RTA processing helps to alleviate this problem and at the same time ensures sufficient dopant activation. However, due to the complex micro-structural changes in both poly-Si and WSix (x˜2.5) layers during the RTA process, the time dependence of the diffusion processes and dopant distribution are difficult to predict. Consequently, the process optimization and device simulations are rather unreliable. We describe a new experimental technique to measure lateral dopant diffusion and 2-dimensional dopant distribution in RTA processed W-polycide structures using conventional SIMS analysis of lithographically defined test structures. Our experiments show that the technique is capable of measuring lateral dopant diffusion over distances between one and tens of microns without losing the vertical resolution of conventional SIMS profiling. The technique can be used to study diffusion processes in a variety of materials and multi-layer structures.

Limiting thermal exposure time using Rapid Thermal Processing (RTP) is now emerging as a promising simplified process for manufacturing of terrestrial solar cells in a continuous way. In this work, we present results on simultaneous formation of emitter, back-surface field and surface passivation in a single rapid thermal cycle. Spin-on dopants (SOD) solutions are used as dopant sources. Optimal emitter profiles, low sheet resistances and high gettering effect are reached. The residual SOD film is used as a surface passivation layer. Solar cells with efficiencies in the range 10 – 14 % are obtained depending on temperature and time processing.

Up to now, kinetic effects in rapid thermal processing (RTP) have been assessed qualitatively and rather vaguely through the concept of thermal budget. We discuss the shortcomings associated with thermal budget and present an alternate conceptual framework that explicitly treats selectivity between desired and undesired physical phenomena. This framework is quite simple and is intended for rapidly assessing the qualitative effects of various heating programs. From a purely kinetic perspective, selecting the best program involves only comparing the activation energies for the desired and undesired rate phenomena. We cite examples where application of the thermal budget approach gives incorrect guidance for minimizing the undesired process. Such deficiencies are rectified by the framework presented here.

The effects of nitrogen diffusion from both N2 gas phase and TiN solid phase sources on the characteristics of Ti/TiN bilayer and TiN/Ti/TiN trilayer films have been investigated in terms of both materials properties such as resistance, coloration, composition, and crystallinity, and prospective applications such as for DRAM bit line interconnections and contact-hole plugs. Using blank films it has been found, in coincidence with other work, that at the onset of N diffusion and hence low N concentrations within a Ti film, the sheet resistance increases and the Ti layer becomes a solid solution of N in hexagonal Ti. As the concentration increases, the sheet resistance reaches a maximum, after which it decreases abruptly and the structure becomes primarily tetragonal Ti2N phase. At higher concentrations the resistance stabilizes or increases slightly and the structure becomes more cubic TiN phase. Sheet resistances calculated from resistance measurements of Ti and TiN mono- and multilayer conductor lines with and without RTN and RTAr thermal treatments have shown that the conductor lines exhibit similar behavior to the blank films. In comparison with the mon-olayer lines, the multilayer ones are generally lower in resistance and more stable over a wider range of post-deposition process temperatures.

Furnace annealing after plasma processing and other process steps such as implantation and contact formation in advanced CMOS processing are extensively used to improve the overall device characteristics. With an ever emerging trend towards lower thermal budget processing and the unique capabilities of RTP to provide that along with flexibility to change process ambients, we present the results of our experiments to do low temperature mixed gas and pure hydrogen anneals in RTP and study its effects on junction leakage and transistor characteristics.

Recently, with the advent of the contact plug technology, the sintering function is not as important as the alloy effect on the transistor and junction device parameters. Therefore, the requirements for the alloy are more related to threshold voltage, (Vt) uniformity and reduced junction leakage. The key is that the hydrogen atoms diffuse far into the silicon to reach the dangling bonds at the field edge and by the transistors. The hydrogen rapid thermal processor (HRTP) can accomplish the basic device annealing function as long as there is sufficient time for hydrogen diffusion and reaction time. The aluminum metallization limits the temperature to 500°C due to increased metal roughness and increased metal resistance. Also, the hotter temperatures compete in the reaction by breaking hydrogen bonds as well as satisfying the dangling silicon bonds. The best ambient gas was at 100% hydrogen flow at low pressure with HRTP times in excess of one minute.