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Understanding and Modeling Ramp Rate Effects on Shallow Junction Formation

Published online by Cambridge University Press:  17 March 2011

Srinvasan Chakravarthi ,
Alp H. Gencer ,
Scott T. Dunham  and
Daniel F. Downey
Srinvasan Chakravarthi
Affiliation:
Department of Manufacturing Engineering, Bosten University, Bosten, MA 02215
Alp H. Gencer
Affiliation:
Avant! Corp., TCAD Division, Wellesle, MA
Scott T. Dunham
Affiliation:
Department of Electrical Engineering, University of Washington, Seattle, WA, 98195
Daniel F. Downey
Affiliation:
Varian Semiconductor Equipment Associates, Gloucester, WA 01930
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Summary

In summary, we find it is possible to model the extent of diffusion during spike anneals with varying ramp rates by considering the full thermal cycle. These models allow the optimization of RTP ammealing cycles considering the trade-offs between junction depth and sheet resistance. For example, with 1050°C spike anneals, the active dose (and thus sheet conductivity) varies approximately linearly with junction depth. However, faster ramp rates allow the use of higher spike temperatures, with associated higher activation and reduced sheet resistance for the same junction depth.

Work at Bosten University and the University of Washington was supported by the Semiconductor Research Corporation. We would like to thank Eric Perozziello for details and discussion regarding their experimental results.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 610: Symposium B – Si Front End Processing - Physics & Technology..II , 2000 , B4.8
Copyright
Copyright © Materials Research Society 2000

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References

1 Downey, D.F., Felch, S.F., and Falk, S.W.. In Advances in Rapid Thermal Processing, Proc. of Elec. Soc. Meet. (1999).Google Scholar
2 Agarwal, A., Gossmann, H.-J. and Fiory, A.T.. In Si Front-End Proceesing-Phys and Tech. of Dopant-Defect Interactions, 568 MRS Symp. Proc., April(1999).Google Scholar
3 Gencer, A.H. and Dunham, S.T.. In Si Front-End Processing-Physiscs and Technology of Dopoant- Defect Interactions, Materials Research Soc., (1999).Google Scholar
4 Eaglesham, D.J., Stolk, P.A., Gossmann, H.J., and Poate, J.M.. Appl. Phys. Lett. 65(18), 2305 (1994).10.1063/1.112725Google Scholar
5 Chao, H.S.. “Phsics and modeling of ion implantation induced transient enhanced diffusion in silicon” Ph.D. thesis, Stanford University (1997).Google Scholar
6 Perozzoello, E. “Physis and modeling of ion implation induced trasient enhanced diffusion in silion” Ph.D. thesis, Stanford University (1998).Google Scholar
7 Chakravarthi, S. and Dunham, S.T.. In SISPAD Technical Digest, 1998.Google Scholar
8 Dunham, S.T., Chakravarthi, S., and Gencer, Alp H.. In IEDM Digest, 1998.Google Scholar