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Transient Leakage Currents in Amorphous Silicon Thin-Film Transistors

Published online by Cambridge University Press:  21 February 2011

M. Hack ,
H. Steemers  and
R. Weisfield
M. Hack
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304
H. Steemers
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304
R. Weisfield
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304
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Abstract

In this paper we present both experimental data and computer simulations of the leakage characteristics of amorphous silicon (a-Si) thin film transistors operated under time transient conditions. The transient behaviour of these devices for realistic operating conditions is often very different from their steady-state characteristics, due to the slow response of deep traps in a-Si. Our model is in good agreement with the data and realistically accounts for the time-dependent behaviour of amorphous silicon with leakage being mainly determined by a combination of fixed charge in the passivation dielectric and a distribution of surface states at the top silicon interface. We show how voltage pulses applied to the gate of a TFT affect its performance as a pixel switch in a two-dimensional array. In particular we concentrate on the effects of light and bias stressing.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 258: Symposium A – Amorphous Silicon Technology – 1992 , 1992 , 949
Copyright
Copyright © Materials Research Society 1992

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References

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