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Threshold Voltage Shift in Hetero-nanocystal Floating Gate Flash Memory

  • Yan Zhu (a1), Dengtao Zhao (a1), Ruigang Li (a1) and Jianlin Liu (a1)

Abstract

The threshold voltage shift of a p-channel Ge/Si hetero-nanocrystal floating gate memory device was investigated both numerically and phenomenologically. The numerical investigations, by solving 2-D Poisson-Boltzmann equation, show that the presence of the Ge on Si dot tremendously prolongs the retention time, reflected by the time decay behavior of the threshold voltage shift. The increase of the thickness of either Si or Ge dot will reduce the threshold voltage shift. The shift strongly depends on the dot density. Nevertheless, only a weak relation between the threshold voltage shift and the tunneling oxide thickness was found. A circuit model was then introduced to interpret the behavior of threshold voltage shift, which agrees well with the results of the numerical method.

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Threshold Voltage Shift in Hetero-nanocystal Floating Gate Flash Memory

  • Yan Zhu (a1), Dengtao Zhao (a1), Ruigang Li (a1) and Jianlin Liu (a1)

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