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Stresses in Thin Film Multilayer Interconnect Structures

Published online by Cambridge University Press:  15 February 2011

S. M. Bruck
Affiliation:
now at Matsushita Electric Industrial Co., Ltd., 3–15 YAGUMO-NAKAMACHI, MORIGUCHI, OSAKA 570 JAPAN
D. B. Knorr
Affiliation:
Materials Engineering Department and Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York 12180–3590
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Abstract

The difference in coefficient of thermal expansion (CTE) between substrate, polymer, and metal leads to complicated stress fields in multilevel interconnect structures that can potentially compromise reliability. This study uses a materials set representative of the General Electric High Density Interconnect (HDI) multichip module technology to monitor the stress level in the thin film layers of metal and polymer. A Kapton HN® film is bonded to a substrate with heat and pressure using a thin layer of Ultem 1000® thermoplastic as an adhesive. Mechanical test structures consist of single or multilayer thin films fabricated on oxidized silicon or alumina substrates. Layers consist of Ultem, Ultem/Kapton, metal (Ti/Cu/Ti), and Ultem/Kapton/metal. The composite stress due to fabrication and thermal cycling between ambient and 275°C is determined by substrate deflection. The initial stress in the polymer materials is due to the thermal excursion during fabrication. Initial metal stress is intrinsic but becomes extrinsic upon thermal cycling. The composite stress in multilayer structures shows a contribution from each individual layer. The relatively low processing temperature minimizes the magnitude of the stress.

Type
Research Article
Copyright
Copyright © Materials Research Society 1992

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