We demonstrate the use of low-energy electron microscopy (LEEM) as a tool for studying dis-location formation in low-Ge-content SiGe films on Si(001) and silicon-on-insulator. Compared to TEM, sample preparation for LEEM consists only of conventional surface cleaning. Yet, because of its sensitivity to local variations in surface strain on Si(001), LEEM can detect dislocations at the earliest stages of strain relaxation. In identically prepared SiGe films, the typical dislocation extends over the entire viewable region of several hundred microns in SiGe/Si, but is less than 100 microns in SiGe/SOI. In addition, dislocation cross-slip and threading segments are common in SiGe/SOI, but virtually non-existent in SiGe/Si. We have also observed dislocation formation in real-time during high temperature annealing. Preliminary results appear to demonstrate dislocation multiplication and blocking at a perpendicular glide plane. The applicability of LEEM to strain relaxation in other Si-based systems will be discussed.