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Source/Drain Overlap Length Dependence of VT in Thin Film Transistor on a-IGZO Channel Deposited by RF and DC Sputtering

Published online by Cambridge University Press:  01 February 2011

Dong Ho Nam
Affiliation:
gentleman@cnu.ac.kr, Chungnam National University, Daejeon, Korea, Republic of
Kwang-Il Choi
Affiliation:
choiki7@cnu.ac.kr, Chungnam national university, Daejeon, Korea, Democratic People's Republic of
Sung Soo Park
Affiliation:
waiter66@cnu.ac.kr, Chungnam National University, Daejeon, Korea, Republic of
Jae Kyeong Jeong
Affiliation:
jaekyeong@samsung.com, Samsung SDI Co., Ltd, Yongin, Korea, Republic of
Ga Won Lee
Affiliation:
gawon@cnu.ac.kr, Chungnam National University, Daejeon, Korea, Republic of
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Abstract

The ZnO TFTs have attracted much attention as key component for flexible displays because they can be fabricated on plastic substrates at low temperature and exhibit good electrical performance. However, the ZnO films are polycrystalline with grain boundaries even if formed at room temperature, which deteriorate the uniformity of TFT characteristics. A few research groups have reported high performance amorphous indium-gallium-zinc oxide TFTs to solve the native problem of nonuniformity of ZnO TFTs. However, there are few researches on the process parameter effects on the variation of a-IGZO TFT characteristics. In this study, we focus on the effect of the source/drain overlap length on threshold voltage(VT) of a-IZO TFTs with differentiating channel deposition method. The experimental structures for this work are bottom-gated TFTs with a-IGZO channel that were deposited by RF and DC magnetron sputtering on glass. RF and DC sputtering were carried out by magnetron power density of (1.4 W/cm2)/ (2.0 W/cm2) in Ar/O2 gas ratio of (65/35)/(72/28), and the entire gas pressure were 5.0 mTorr and 3.4 mTorr. The width/length(um/um) of device was split to 10/7,10/10,10/30,10/50. Each of the patterns has seven source/drain overlap length: -3um,-2um,-1um,0um,1um,2um,3um. We extracted VT of RF and DC through the VG-ID curve. There are significant VT difference in both RF and DC according to the overlap length: VT of DC(RF) is 1.31(0.74)V at W/L=10/50 and 10.21(5.74)V at W/L=10/30. VT increases definitely where less than 1um overlap length and short channel TFT is more influenced by overlap length, which is more severe in RF group. We calculated total channel resistance (RT) from VD-ID curve. RT of devices with the positive overlap can be expressed by RT, Postive=Rch+Rc. Here, Rch is net channel resistance which becomes smaller when channel length decreases and Rc is contact resistance. RT with negative overlap, is RT, Negative=Rch+Rc+Roffset. Roffset is offset resistance formed by negative overlap and can be extracted by subtracting RT, Postive from total RT, Negative. The RT of DC(RF) at offset channel length of-1um,-2um,and-3um is 4.43105(2.7 106)cm, 1.17 106(3.48 106)cm, and 1.46 106(4.73 106)cm, respectively(W/L=10/10um) RF group which shows inferior electrical characteristics such as lower mobility and larger subthreshold slope to DC, have larger Roffset than the DC. This implies that the devices require a bit of positive source/drain overlap length for uniform VT especially when the channel resistance is high. But Overlap region causes difficulties in the device area to be miniaturized. In summary, as the source/drain overlap length decreases to negative value, the threshold voltage of a-IGZO TFTs increases sharply and these tendency strongly depends on a-IZO film quality, which means the overlap length is very important control parameter of a-IGZO TFTs for the uniform threshold voltage especially when the channel resistance is high

Type
Research Article
Copyright
Copyright © Materials Research Society 2009

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References

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