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Solutions to Gate Oxide Integrity on TFSOI Substrates Caused by PMOS Threshold-Voltage Implant

Published online by Cambridge University Press:  10 February 2011

S. Q. Hong ,
T. Wetteroth ,
S. R. Wilson ,
B. Steele  and
D. K. Schroder
S. Q. Hong
Affiliation:
Semi∼conductor Products Sector, Motorola Inc., 2100 E. Elliot Road, Tempe, AZ 85284
T. Wetteroth
Affiliation:
Semi∼conductor Products Sector, Motorola Inc., 2100 E. Elliot Road, Tempe, AZ 85284
S. R. Wilson
Affiliation:
Semi∼conductor Products Sector, Motorola Inc., 2100 E. Elliot Road, Tempe, AZ 85284
B. Steele
Affiliation:
Semi∼conductor Products Sector, Motorola Inc., 2100 E. Elliot Road, Tempe, AZ 85284
D. K. Schroder
Affiliation:
Department of Electrical Engineering, Arizona State University, Tempe, AZ 85287
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Abstract

Due to the lack of effective gettering, gate oxide on thin-film-silicon-on-insulator (TFSOI) substrates is much more sensitive than its bulk Si counterpart to process damage during device fabrication, especially prior to gate oxide growth. Presented in this paper as a typical example is the severe oxide degradation caused by PMOS threshold-voltage implant. Several approaches to circumvent this problem are explored, such as Vt implant without sacrificial oxide (sacox), low temperature anneal before sacox removal, or implementation of lateral gettering. As a result of these efforts, a significant improvement in gate oxide integrity is achieved with increased oxide breakdown voltages and charge-to-breakdowns, as well as a reduction in oxide charge trapping. This work also demonstrates the feasibility of achieving bulk-comparable gate oxide on TFSOI substrates.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 510: Symposium D – Defect & Impurity Engineered Semiconductors & Devices II , January 1998 , 417
Copyright
Copyright © Materials Research Society 1998

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