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Self-Aligned Nanocrystalline Silicon Thin-Film Transistor With Deposited n+ Source/Drain Layer

  • I-Chun Cheng (a1) and Sigurd Wagner (a2)


We demonstrated self-aligned nanocrystalline silicon (nc-Si:H) n-channel thin film transistors (TFTs) with directly deposited n+ layer. The silicon layers were deposited by plasma-enhanced chemical vapor deposition at a substrate temperature of 150°C. The TFTs were made in a staggered top-gate, bottom-source/drain geometry with a seed layer underneath. The self-alignment of top-gate to the bottom-source/drain was achieved by backside exposure photolithography through the glass substrate and the silicon layers, followed by a lift-off process. An extent of gate to source/drain overlap of 1.5 mm was obtained. The self-aligned TFTs have similar characteristics to their non-self-aligned counterpart. This result represents an important step toward directly deposited nc-Si:H TFT backplanes on plastic substrates.



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