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Reliability Improvement of Passivated Power Line in Memory Devices

  • Seong-Min Lee (a1), Y. K. Jang (a2), Y. W. Chung (a2), S. M. Sim (a2), K. W. Lee (a2) and B. K. Hwang (a2)...

Abstract

In the present study, several different types of amorphous passivation layers such as PECVD-SiN and PECVD-TEOS were tested to learn how effectively they protect underlying Al interconnection lines. According to the experimental results, a thick monolithic passivation layer composing of PECVD-SiN was found to be highly susceptible to stress-related migration because it did not have sufficient elasticity. Moreover, since silicon nitride also has a high dielectric-breakdown strength, it exhibits an increased impedance to electric current due to parasitic resistance that exists in the path between the two passivated metal lines. On the other hand, passivation thickening through the use of PECVD-TEOS as an initial layer was estimated to be a more effective way to improve device reliability because of its better step coverage and smaller dielectric constant. The FEM simulation explains why the thick multilayer compromising an alternating sequence of mechanically dissimilar layers is an effective way to suppress stress-induced passivation damage during thermal cycling without having a significant effect on the IC pattern.

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Reliability Improvement of Passivated Power Line in Memory Devices

  • Seong-Min Lee (a1), Y. K. Jang (a2), Y. W. Chung (a2), S. M. Sim (a2), K. W. Lee (a2) and B. K. Hwang (a2)...

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