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Reduction of Sidewall Roughness During Dry Etching of SiO2

Published online by Cambridge University Press:  22 February 2011

F. Ren ,
S. J. Pearton ,
J. R. Lothian ,
C. R. Abemathy  and
W. S. Hobson
F. Ren
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
S. J. Pearton
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
J. R. Lothian
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
C. R. Abemathy
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
W. S. Hobson
Affiliation:
AT&T Bell Laboratories, Murray Hill, NJ 07974
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Abstract

The appearance of striations on dry etched semiconductor laser mesas is a common feature of these structures. We describe a number of different methods of reducing the extent of this roughness, including the choice of dielectric etch chemistry, modification of the initial resist processing and deposition of a SiN sidewall to prevent additional rougheningduring the plasma etch step. SF6 is found to be preferable to CF4 for dielectric etching because of an absence of polymer formation. This produces smoother SiO2 sidewalls. Flood exposure of the initial photoresist mask and optimization of the postbake temperature also produces smoomer sidewalls on the subsequently etched SiO2. The sidewall can also be protected from roughening that occurs during the dry etch step by coating it with a low temperature SiN layer. A combination of all of these methods produces sidewalls with morphological variations of ≤500Å.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 282: Symposium E – Chemical Perspectives of Microelectronic Materials III , 1992 , 529
Copyright
Copyright © Materials Research Society 1993

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References

REFERENCES

1. Hou, D. T. C., Yen, M. F., Wynn, J. D. and Wilt, D. P., J. Electrochem. Soc., vol. 136, p. 1828, 1989.Google Scholar
2. Chakrabarti, U. K., Pearton, S. J. and Ren, F., Semicond. Sci. Techn. vol. 6, p. 408, 1991.Google Scholar
3. Bhat, R., Caneau, C., Zah, C. E., Ga, M. A. K., Bonner, W. A., Hwang, D. M., Schwartz, S. A., Menveal, S. G. and Favire, F. G., J. Cryst. Growth, vol. 107, p. 772, 1991.Google Scholar
4. Indium phosphide and related materials ed. Katz, A. (Artech House, Boston 1991), p. 287.Google Scholar
5. Hou, D. T. C., Yan, M. F. and Wynn, J. D., J. Electrochem. Soc., vol. 137, p. 3639, 1990.Google Scholar
6. van Roosmalen, A. J., van Arendonk, A. P. M., Arends, H. T. and Schmidt, F., “Etching of silicon in low frequency chlorine discharges”, Proc. 5th Symp. Plasma Processing, ECS Proc. vol. 85–1, p. 527, 1985.Google Scholar
7. U. S. Patent, 4, 253, 388 (1981) IBM.Google Scholar
8. U. S. Patent, 4, 187, 331 (1980) IBM.Google Scholar
9. Bernacki, S. E. and Kosicki, B. B., “Controlled film formation during CCl4 plasma etching”, Proc. 4th Symp. Plasma Processing, ECS Proc. vol. 83–10, p. 505, 1983.Google Scholar
10. Donnelly, V. M., Flamm, D. L., Dautremont-Smith, W. C. and Werder, D. J., J. Appl. Phys. vol. 55, p. 242, 1984.Google Scholar
11. Zhang, M., Li, J. Z., Adesida, I. and Wolf, E. D., J. Vac. Sci. Technol. Bl (4), p. 1037, 1983.Google Scholar
12. Lothian, J. R., Ren, F., Pearton, S. J., Chakrabarti, U. K., Abernathy, C. R. and Katz, A. (to be published).Google Scholar