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Rapid Thermal Annealing of Composite TaSi2/n+ Poly-Si Silicide Films

Published online by Cambridge University Press:  22 February 2011

D.L. Kwong
Affiliation:
Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN 46556
R. Kwor
Affiliation:
Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN 46556
B.Y. Tsaur
Affiliation:
Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, MA 02173
K. Daneshvar
Affiliation:
Allison Laboratory, Auburn University, Auburn, AL 36849
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Abstract

The formation of composite TaSi2/n+ Poly-Si silicide films through the use of rapid thermal annealing (RTA) is investigated by x-ray diffraction, four point probe, scanning Auger microprobes (SAM) with ion sputter etching, transmission electron microscopy (TEM), scanning electron microscopy (SEM), and capacitance-voltage (C-V) measurements. 0.2 μm polysilicon is deposited on oxidized Si wafer by LPCVD and doped with phosphorus. A layer of 2200 A TaSix is then co-sputtered on polysilicon samples from separate targets. These as-deposited films are then annealed by RTA in an argon ambient for 1 sec. and 10 sec. at various temperatures. X-ray diffraction and SAM results show the rapid formation of a uniform stoichiometric tantalum disilicide via Si migration from polysilicon. TEM micrographs show simlilar results for samples annealed at 1000°C in furnace for 30 min. or by RTA for 1 sec., exhibiting average grain size greater than 1000 A. Sheet resistance of samples annealed by furnace annealing and RTA are comparable. SEM micrographs indicate that the surface morphology of the RTA-annealed sample is superior to that obtained by furnace annealing. These results show that RTA may offer a practical solution to low-resistivity silicide formation in VLSI circuits.

Type
Research Article
Copyright
Copyright © Materials Research Society 1984

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References

REFERENCES

[1]Crowder, B.L. and Zirinsky, S., IEEE Trans. on Electron Dev., ED–26, p.369, 1979.Google Scholar
[2]Tsai, M.Y., Chao, H.H., Ephrath, L.M., Crowder, B.L., Cramer, A., Bennett, R.S., Lucchese, C.J., and Wordeman, M.R., J. Electrochem. Soc., Vol. 128, p.2207, 1981.Google Scholar
[3]Sinha, A.K., Lindengerger, W.S., Fraser, D.B., Murarka, S.P., and Fals, E.N., IEEE J. Solid State Circuits, Vol. SC–15, p. 490, 1981.Google Scholar
[4]Murarka, S.P., Fraser, D.B., Sinha, A.K., and Levinstein, H.J., IEEE Trans. Electron Dev., ED–27, p.1409, 1980.Google Scholar
[5]Fulks, R.T., Powell, R.A., and Stach, W.T., IEEE Electron Device Letters EDL–3, p.179, 1982.Google Scholar
[6]Sedgwick, T.O., D'Heurle, F.M., and Cohen, S.A., ECS Spring Meeting, May 8–13, 1983. Abstract No. 391.Google Scholar