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Observation of GaAs/Si Interface by Tem: Effect of Annealing on the Structure

Published online by Cambridge University Press:  26 February 2011

A. Rocher
Affiliation:
Laboratoire d'Optique Electronique du CNRS −29 rue Jeanne Marvig, F-31400 TOULOUSE, FRANCE
M. N. Charasse
Affiliation:
THOMSON-CSF/LCR- Domaine de Corbeville, F-91401 ORSAY- FRANCE.
A. Georgakilas
Affiliation:
THOMSON-CSF/LCR- Domaine de Corbeville, F-91401 ORSAY- FRANCE.
J. Chazelas
Affiliation:
THOMSON-CSF/LCR- Domaine de Corbeville, F-91401 ORSAY- FRANCE.
J. P. Hirtz
Affiliation:
THOMSON-CSF/LCR- Domaine de Corbeville, F-91401 ORSAY- FRANCE.
H. Blancka
Affiliation:
THOMSON-SC/DAG -Route 203- Domaine de Corbeville - F-91401 ORSAY- FRANCE.
J. Siejka
Affiliation:
G.P.S., Université Pierre et Marie Curie - Tour 23 - F-75005 PARIS- FRANCE.
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Abstract

We present in this paper the effect of heat treatments applied to a 400 nm GaAs layer grown by MBE on a (001) Silicon substrate. These heat treatments have been applied during or after the growth of the GaAs, in order to improve the crystalline quality of the layer. RBS and TEM observations have been performed to study the improvement of the crystalline quality of the GaAs layer. Specimens, prepared by cross-section technique along both (110) and (170) planes and plane view, have been studied by TEM. Observations of cross-section by HREM show an interface roughness of about 1.5 nm before and after heat treatments. A roughness, observed also by RHEED, appears in the first stage of growth. Although the density of threading dislocations decreases after heat treatments.

Type
Research Article
Copyright
Copyright © Materials Research Society 1988

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References

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