The memory retention properties of Pt/YMnO3/Y2O3/Si capacitors were investigated for the application of ferroelectric gate transistors. The epitaxially grown Pt/YMnO3/Y2O3/Si capacitors showed ferroelectric type hysteresis loop on the capacitance-voltage properties. Although the retention time of the as-deposited capacitors was ∼103 s, it was prolonged up to 104 s when the leakage current density was reduced from 4×10-8 A/cm2 to 2×10-9 A/cm2 by the annealing under N2 ambience. To reveal the relationship between the retention time and leakage current, the leakage current mechanism was investigated comparing several conduction mechanisms. It was found that the dominant leakage mechanisms at high and low electric fields were Poole-Frenkel emission from the Y2O3 layer and ohmic conduction, respectively. This result indicates that the leakage current was limited by the Y2O3 layer at high electric field and was mainly dominated by the amount of defects in the YMnO3 layer at low electric field. From the pseudo isothermal capacitance transient spectroscopy (ICTS), it was determined that the trap density was in an order of 1015 cm-3. Since the variation of the leakage current by annealing was observed only in the low electric field region, it is suggested that the retention properties of the Pt/YMnO3/Y2O3/Si capacitors was influenced by the amount of defects in the YMnO3 layer.