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The Impact of Field Plate Resistivity on the Performance of a Novel High Voltage Thin Film Transistor Incorporating a Semi-Insulating Layer

Published online by Cambridge University Press:  15 February 2011

Y. Chen
Affiliation:
Engineering Department, University of Cambridge, Cambridge, CB2 1PZ, UK Electrical Engineering and Electronics Department, University of Liverpool, Brownlow Hill, Liverpool L69 3BX, UK
F. J. Clough
Affiliation:
Emerging Technologies Research Centre, De Montfort University, Leicester, LEI 9BH, UK
E. M. Sankara Narayanan
Affiliation:
Emerging Technologies Research Centre, De Montfort University, Leicester, LEI 9BH, UK
Y. Z. Xu
Affiliation:
Emerging Technologies Research Centre, De Montfort University, Leicester, LEI 9BH, UK
W. Eccleston
Affiliation:
Electrical Engineering and Electronics Department, University of Liverpool, Brownlow Hill, Liverpool L69 3BX, UK
W. I. Milne
Affiliation:
Engineering Department, University of Cambridge, Cambridge, CB2 1PZ, UK
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Abstract

The Semi-Insulating field plated High Voltage TFT (SI HVTFT) is a new poly-Si HVTFT structure with a much improved blocking capability and enhanced on-state performance [1][2]. The unique feature of the SI HVTFT is the semi-insulating amorphous oxygen-doped Si (SIAOS) field plate which connects the gate to the drain and reshapes the potential distribution in the offset region. The leakage current, flowing through the SIAOS field plate during device operation, determines device performance. In this paper, both experimental and 2-D simulation results for devices with different field plate conductivities are used to investigate the impact of the field plate properties on the performance of the SI HVTFT structure.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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References

REFERENCES

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