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Evolution of Texture and Microstructure in Rough Polycrystalline Silicon for Advanced Dram Applications

Published online by Cambridge University Press:  10 February 2011

A. Banerjee
Affiliation:
Texas Instruments Incorporated, Semiconductor Process and Device Center, Dallas, Texas
R. L. Wise
Affiliation:
Texas Instruments Incorporated, Semiconductor Process and Device Center, Dallas, Texas
D. L. Crenshaw
Affiliation:
Texas Instruments Incorporated, Semiconductor Process and Device Center, Dallas, Texas
R. B. Khamankar
Affiliation:
Texas Instruments Incorporated, Semiconductor Process and Device Center, Dallas, Texas
Hal Edwards
Affiliation:
Texas Instruments Incorporated, Material Science Laboratory, Daifas, Texas
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Abstract

This study investigates the morphology, roughness and electrical performance of rough polysilicon films deposited by LPCVD process. The deposition duration was varied over a broad range to study the evolution of microstructural texture in terms of nuclei formation, growth and grain coalescence. The area enhancement factor (AEF) of rough polysilicon film, expressed as the ratio of cell capacitance incorporating textured film to that of a smooth polysilicon film is observed to range from 1.4 to 2.4 for the above conditions. It is observed that the AEF shows a strong dependence on the microstructural texture and correlates with the surface roughness. A model for electrical AEF based on grain morphology attributes from AFM is included. The dependence of rough polysilicon nucleus cluster density on silane flow rate and deposition temperature is also presented.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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References

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