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Enhanced Mobility in 100 nm Strained SiGe Vertical P-MOSFETs Fabricated by UHVCVD

Published online by Cambridge University Press:  15 March 2011

Sankaran Jayanarayanan
Affiliation:
University of Texas, Pickle Research Campus, 10100 Burnet Road, Building 160, Austin, TX 78758, U.S.A.
Freek Prins
Affiliation:
University of Texas, Pickle Research Campus, 10100 Burnet Road, Building 160, Austin, TX 78758, U.S.A.
Xiangdong Chen
Affiliation:
University of Texas, Pickle Research Campus, 10100 Burnet Road, Building 160, Austin, TX 78758, U.S.A.
Sanjay Banerjee
Affiliation:
University of Texas, Pickle Research Campus, 10100 Burnet Road, Building 160, Austin, TX 78758, U.S.A.
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Abstract

Strained SiGe vertical PMOSFETs with a channel length of 100 nm have been fabricated without sophisticated lithography and the whole process is compatible with a regular CMOS process. The source, channel and drain layers with in situ doping were grown by ultrahigh vacuum chemical vapor deposition (UHVCVD) at 500 °C. Atomic force microscopy (AFM) of the SiGe and silicon sample surfaces shows the RMS roughness to be 0.18 nm. X-ray diffraction (XRD) rocking curves of the Si (004) plane demonstrate that the SiGe layers do result in compressive strain. The drive current for the vertical SiGe PMOSFET was enhanced by as much as 80% as compared with the silicon control device, in both the forward and reverse modes of operation.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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References

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