We report the electrical characterization of a direct tunneling diode structure that incorporates a multilayer dielectric. The dielectric consists of a stack of two thermally grown, ultrathin SiO2 layers, each ∼3.5 rin thick, separated by a deposited, continuous, undoped, ultrathin nanocrystalline Si layer ∼5.0 nm thick. Electrical measurements of this structure are reported for both n-type and p-type Si substrates. We find that the room temperature transport through this structure is accounted for by describing the intermediate Si layer as a quantum well with a continuum of states, and by otherwise assuming bulk properties for the ultrathin layers, such as the existence of a bandgap in the Si well and the usual Si-SiO2 interface potential barrier height at all interfaces. This structure is expected to be useful as the active dielectric in nonvolatile memory devices.